IC42S81600 Datasheet, PDF (35/69 Pages) Integrated Circuit Solution Inc – 4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM

IC42S81600/IC42S81600L
IC42S16800/IC42S16800L
Clock Suspension During Burst Read (Using CKE) (1 of 2)
CLK
CKE
CS
Burst Length=4, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
t
CK2
RAS
CAS
WE
*BS0
A10
RAa
ADD
RAa
CAa
DQM
Hi-Z
DQ
QAa0 QAa1
QAa2
Activate
Command
Bank A
Read
Command
Bank A
Clock
Suspended
1 Cycle
Clock
Suspended
2 Cycles
tHZ
QAa3
Clock
Suspended
3 Cycles
BS1=”L”, Bank C,D = Idle
Integrated Circuit Solution Inc.
35
DR023-0E 6/11/2004