IC-HTP Datasheet, PDF (47/51 Pages) IC-Haus GmbH – DUAL CW P-TYPE LASER DIODE DRIVER

iC-HTP
DUAL CW P-TYPE
LASER
DIODE
DRIVER
preliminary
Channel 2 configuration registers
EACC2
0
1
Addr. 0x15; bit 0
R/W 0
APC mode enabled for channel 2 (light power
regulation)
ACC mode enabled for channel 2 (laser current
regulation)
Table 122: Enable APC/ACC channel 2
ECIE2
0
1
Addr. 0x15; bit 1
R/W 0
External CI capacitor for channel 2 disconnected
External CI capacitor for channel 2 connected
Table 123: Enable external CI capacitor channel 2
Rev B1, Page 47/51
ILIM2
0x00
...
0xFF
Addr. 0x16; bit 7:0
R/W 0xFF
Channel 2 overcurrent threshold set to the minimum
current in APC mode (EACC2 = 0) or overcurrent
protection disabled in ACC mode (EACC2 = 1)
Channel 2 overcurrent threshold set to
Ilim = (∆I(LDA), max · n · k), n from 0 to 255
Channel 2 overcurrent threshold set to the maximum
current
Table 128: Overcurrent threshold configuration
channel 2
RMD2
0x00
...
0xFF
Addr. 0x17; bit 7:0
R/W 0xFF
PLR2 resistor set to the minimum resistance
PLR2 resistor set to Rmd
= Rmd₀(1 +
∆
Rmd(%)
100
)ⁿ
+
1
,
n from 0 to 255
PLR2 resistor set to the maximum resistance
Table 129: MDK resistor channel 2
DISP2
0
1
Addr. 0x15; bit 2
PLR enabled for channel 2
PLR disabled for channel 2
R/W 0
Table 124: Disable PLR channel 2
COMP2
000
...
111
Addr. 0x18; bit 6:4
R/W 011
Minimum compensation current for the channel 2
regulator, slower response
Maximum compensation current for the channel 2
regulator, faster response
Table 130: Current compensation channel 2
DISC2
0
1
Addr. 0x15; bit 3
Channel 2 can be enabled by pin EC2
Channel 2 cannot be enabled by pin EC2
R/W 1
Table 125: Disable channel 2
EOC2
0
1
Addr. 0x15; bit 4
R/W 1
Channel 2 regulator offset compensation disabled
Channel 2 regulator offset compensation enabled
Table 126: Enable offset compensation channel 2
ADCC2(2:0)
Addr. 0x15; bit 7:5
R/W 000
0xx
Channel 2 ADC disabled
100
Channel 2 ADC sourced by V(MDK2), ADFNS2 = 1,
CMES2 = 0
100
Channel 2 ADC sourced by V(PLR2), ADFNS2 = 0,
CMES2 = 0
100
Channel 2 ADC sourced by ACC current sensor,
CMES2 = 1
101
Channel 2 ADC sourced by V(VDD)
110
Channel 2 ADC sourced by V(VBL2)
111
Channel 2 ADC sourced by V(LDA2)
Table 127: ADC channel 2 source selection
RLDAS2
00
01
10
11
Addr. 0x18; bit 3:2
R/W 00
V(LDA2) > VBL2-0.5 V sets the LDASAT2 alarm bit
V(LDA2) > VBL2-0.8 V sets the LDASAT2 alarm bit
V(LDA2) > VBL2-1.0 V sets the LDASAT2 alarm bit
V(LDA2) > VBL2-1.2 V sets the LDASAT2 alarm bit
Table 131: LDA saturation threshold selection
channel 2
REF2
0x000
...
0x3FF
Addr. 0x18/19; bit 9:0
R/W 0x000
Channel 2 regulator reference voltage set to
minimum voltage
Channel 2 regulator reference voltage set to
Vref
=
Vref₀(1
+
∆
Vref (%)
100
)ⁿ
+
1
,
n
from
0
to
1023
Channel 2 regulator reference voltage set to
maximum voltage
Table 132: Regulator voltage reference channel 2
RACC2
0
1
Addr. 0x1A; bit 4
R/W 0
Current range high for channel 2, Current sensor
resistor (Rsensex) set to 2kΩ
Current range low for channel 2, Current sensor
resistor (Rsensex) set to 16kΩ
Table 133: Current range configuration channel 2