IC-HTP Datasheet, PDF (45/51 Pages) IC-Haus GmbH – DUAL CW P-TYPE LASER DIODE DRIVER

iC-HTP
DUAL CW P-TYPE
LASER
DIODE
DRIVER
preliminary
Channel 1 configuration registers
EACC1
0
1
Addr. 0x10; bit 0
R/W 0
APC mode enabled for channel 1 (light power
regulation)
ACC mode enabled for channel 1 (laser current
regulation)
Table 106: Enable APC/ACC channel 1
ECIE1
0
1
Addr. 0x10; bit 1
R/W 0
External CI capacitor for channel 1 disconnected
External CI capacitor for channel 1 connected
Table 107: Enable external CI capacitor channel 1
Rev B1, Page 45/51
ILIM1
0x00
...
0xFF
Addr. 0x11; bit 7:0
R/W 0xFF
Channel 1 overcurrent threshold set to the minimum
current in APC mode (EACC1 = 0) or overcurrent
protection disabled in ACC mode (EACC1 = 1)
Channel 1 overcurrent threshold set to
Ilim = (∆I(LDA), max · n · k), n from 0 to 255
Channel 1 overcurrent threshold set to the maximum
current
Table 112: Overcurrent threshold configuration
channel 1
RMD1
0x00
...
0xFF
Addr. 0x12; bit 7:0
R/W 0xFF
PLR1 set to the minimum resistance
PLR1 resistor set to Rmd
= Rmd₀(1 +
∆
Rmd(%)
100
)ⁿ
+
1
,
n from 0 to 255
PLR1 resistor set to the maximum resistance
Table 113: MDK resistor channel 1
DISP1
0
1
Addr. 0x10; bit 2
PLR enabled for channel 1
PLR disabled for channel 1
R/W 0
Table 108: Disable PLR channel 1
COMP1
000
...
111
Addr. 0x13; bit 6:4
R/W 011
Minimum compensation current for the channel 1
regulator, slower response
Maximum compensation current for the channel 1
regulator, faster response
Table 114: Current compensation channel 1
DISC1
0
1
Addr. 0x10; bit 3
Channel 1 can be enabled by pin EC1
Channel 1 cannot be enabled by pin EC1
R/W 1
Table 109: Disable channel 1
EOC1
0
1
Addr. 0x10; bit 4
R/W 1
Channel 1 regulator offset compensation disabled
Channel 1 regulator offset compensation enabled
Table 110: Enable offset compensation channel 1
ADCC1(2:0)
Addr. 0x10; bit 7:5
R/W 000
0xx
Channel 1 ADC disabled
100
Channel 1 ADC sourced by V(MDK1), ADFNS1 = 1,
CMES1 = 0
100
Channel 1 ADC sourced by V(PLR1), ADFNS1 = 0,
CMES1 = 0
100
Channel 1 ADC sourced by ACC current sensor,
CMES1 = 1
101
Channel 1 ADC sourced by V(VB)
110
Channel 1 ADC sourced by V(VBL1)
111
Channel 1 ADC sourced by V(LDA1)
Table 111: ADC channel 1 source selection
RLDAS1
00
01
10
11
Addr. 0x13; bit 3:2
R/W 00
V(LDA1) > VBL1-0.5 V sets the LDASAT1 alarm bit
V(LDA1) > VBL1-0.8 V sets the LDASAT1 alarm bit
V(LDA1) > VBL1-1.0 V sets the LDASAT1 alarm bit
V(LDA1) > VBL1-1.2 V sets the LDASAT1 alarm bit
Table 115: LDA saturation threshold selection
channel 1
REF1
0x000
...
0x3FF
Addr. 0x13/14; bit 9:0
R/W 0x000
Channel 1 regulator reference voltage set to
minimum voltage
Channel 1 regulator reference voltage set to
Vref
=
Vref₀(1
+
∆
Vref (%)
100
)ⁿ
+
1
,
n
from
0
to
1023
Channel 1 regulator reference voltage set to
maximum voltage
Table 116: Regulator voltage reference channel 1
RACC1
0
1
Addr. 0x1A; bit 0
R/W 0
Current range high for channel 1, Current sensor
resistor (Rsensex) set to 2kΩ
Current range low for channel 1, Current sensor
resistor (Rsensex) set to 16kΩ
Table 117: Current range configuration channel 1