IC-HTP Datasheet, PDF (24/51 Pages) IC-Haus GmbH – DUAL CW P-TYPE LASER DIODE DRIVER

iC-HTP
DUAL CW P-TYPE
LASER
DIODE
DRIVER
preliminary
PDOVBL2
0
1
Addr. 0x01; bit 7
R
VBL2 power down not occurred since last read. If
MERGE = 1, VBL1 and VBL2 had no power down
since last read
VBL2 power down event has occurred. If MERGE =
1, VBL1 or VBL2 had a power down event. Cleared
on read
Table 52: VBL2 power down
Rev B1, Page 24/51
VB
CVB
1μF
CVDD
1μF
GND
DUAL CW LASER DIODE DRIVER
VDD REGULATOR
VB
- ^REF
VDD
+
NCHK
EMC
NCS/A1
MOSI/A0
SCLK/SCL
MISO/SDA
INS/WKR
NSTBY
EC1
EC2
T.PAD
GND
VB UNDERVOLTAGE
VDD UNDERVOLTAGE
CFGTIMO
Check
PODO
OVC
MEMERR
WATCHDOG
OVT
IO DRIVERS
TEMPERATURE
MONITOR 8 Bit
RAM
INTEGRITY
CHECK
0x10 0x30
0x1F 0x3F
RAM
REGISTERS
0x13 REF1(9:8)
0x14 REF1(7:0)
0x11 ILIM1(7:0)
WATCHDOG
TIMER
OSCILLATOR
0x12 RMD1(7:0)
SPI/I2C
SLAVE
LASER
CONTROL
0x03
0x04
ADC1(9:8)
ADC1(7:0)
0x10 ADCC1(2:0)
0x16 ILIM2(7:0)
0x18
0x19
REF2(9:8)
REF2(7:0)
0x05
0x06
ADC2(9:8)
ADC2(7:0)
0x17 RMD2(7:0)
0x02 TEMP(7:0)
10 Bit
D
A
EACC1
8 Bit
D
A
+
-
CI
OVC
ECIE1
DCO
VBL1
CIH1
CI1
LDA1
ACC
VDD
MRH1
VB
CI1
..10 nF..
I LDA1
EM C
8 Bit
DISP1
R
0
255
10 Bit
A
D
LDA1
VBL1
VB
A DM DK 1
LASER CHANNEL 1 ^ADFNS1
x1
x2
Signal Level Converter
CI
LDA2
10 Bit
A
D
VBL2
VDD
ADM DK2
APC
MDK1
VBL2
CIH2
CI2
LDA2
MRH2
RM1
P
VB
I LDA2
LASER CHANNEL 2
MDK2
Figure 11: Combining both channels
In combined mode, the internal CI nodes of both chan-
nels are connected together. If required, an external
capacitor on channel 1 can be used for improved stabil-
ity. It is possible to have an additional external capacitor
on channel 2 if ECIE2 bit is set to 1. Having an exter-
nal capacitor on channel 2 and none on channel 1 is
invalid.
On combined operation both overcurrent thresholds
are active. The overcurrent threshold channel 1 ILIM1
needs to be set accordingly to the selected current
range as stated below. If both CRNG1 and CRNG2
are the same, set to 50% of the equivalent value for a
single channel operation.
Ilim(merge) = (∆I(LDA), max) · n · (k1 + k2)
n=
Ilim(merge)
(k1 + k2) · ∆I(LDA), max
with n from 1 to 255.
The overcurrent threshold channel 2 ILIM2 must be
disabled by setting it to its minimum value (0x00). An
overcurrent will only be detected on channel 1.
ILIM1
0x00
...
0xFF
Addr. 0x11; bit 7:0
R/W 0xFF
Channel 1 overcurrent threshold set to the minimum
current in APC mode (EACC1 = 0) or overcurrent
protection disabled in ACC mode (EACC1 = 1)
Channel 1 overcurrent threshold set to
Ilim = (∆I(LDA), max · n · k), n from 0 to 255
Channel 1 overcurrent threshold set to the maximum
current
Where k1 depends on CRNG1 and k2 depends on ^{Table 53: Overcurrent threshold configuration}
CRNG2.
channel 1