IC-HTP Datasheet, PDF (41/51 Pages) IC-Haus GmbH – DUAL CW P-TYPE LASER DIODE DRIVER

iC-HTP
DUAL CW P-TYPE
LASER
DIODE
DRIVER
preliminary
Rev B1, Page 41/51
REGISTER OVERVIEW
OVERVIEW
Addr
Bit 7
0x00 R CFGTIMO
0x01 R PDOVBL2
0x02 R
0x03 R
0x04 R
0x05 R
0x06 R
0x07 R
...
0x0F R
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
EXTT2
0x1B
0x1C
0x1D
SOSCERR
0x1E
0x1F
0x20
...
0x30
0x31
...
0x3F
Bit 6
OSCERR
LDASAT2
Bit 5
OVC1
MONC2
Bit 4
Bit 3
OVC2
OVT
MAPC2
PDOVBL1
TEMP(7:0)
Bit 2
MEMERR
LDASAT1
ADC1(7:0)
ADCC1(2:0)
ADCC2(2:0)
ADFNS2
MERGE
SOVC2
ADC2(7:0)
Not implemented
Not implemented
CHIPREV(7:0)
EOC1
DISC1
DISP1
ILIM1(7:0)
RMD1(7:0)
COMP1(2:0)
RLDAS1(1:0)
REF1(7:0)
EOC2
DISC2
DISP2
ILIM2(7:0)
RMD2(7:0)
COMP2(2:0)
RLDAS2(1:0)
REF2(7:0)
CMES2
RACC2
EXTT1
ADFNS1
RDCO(5:0)
Not implemented
SOVC1
SOVT
MLDASAT2 MLDASAT1
CRNG2(1:0)
Reserved register(Factory test). Set to zero
Not implemented
Not implemented
Validation content for 0x10, inverted
Validation content for 0x11, inverted
...
Validation content for 0x1F, inverted
Bit 1
PDOVDD
MONC1
Bit 0
INITRAM
MAPC1
ADC1(9:8)
ADC2(9:8)
ECIE1
EACC1
REF1(9:8)
ECIE2
EACC2
REF2(9:8)
CMES1
RACC1
MODE(1:0)
MMONC MOSCERR
CRNG1(1:0)
Table 82: Register layout