IC-HTP Datasheet, PDF (38/51 Pages) IC-Haus GmbH – DUAL CW P-TYPE LASER DIODE DRIVER

iC-HTP
DUAL CW P-TYPE
LASER
DIODE
DRIVER
preliminary
Rev B1, Page 38/51
DIGITAL INTERFACE AND MEMORY INTEGRITY MONITOR
iC-HTP provides a microcontroller slave interface by se-
lection on the EMC pin. iC-HTP support the interfaces
SPI or I²C that are selected by the INS/WKR pin.
EMC
lo
Open
hi
Addr. Pin;
iC-WK-mode, digital interfaces disabled
Not allowed, error signaled
MCU mode, interface selected by INS/WKR enabled
Table 79: Enable microcontroller
nels. iC-HTP has two different modes selectable by the
MODE(1:0) register (addr. 0x1C).
MODE(1:0)
Addr. 0x1C; bit 1:0
00
Not allowed
01
Chip set in operation mode
(apply configuration, latch transparent)
10
Chip set in configuration mode
(hold previous configuration)
11
Not allowed
R/W 01
INS/WKR
lo
Open
hi
Addr. Pin;
SPI interface selected
Not allowed, error signaled.
I²C interface selected
Table 80: Interface selection I²C or SPI
The configuration memory is integrity monitored and
atomic executable (all at once: changes of the con-
figurations without any direct effects, the changes are
executed at once by command ) to the functional blocks
of iC-HTP.
Integrity monitoring is implemented by a duplication of
the configuration registers into a validation page (see
description below) where the register are automatically
copied with inverted value. Every register bit is com-
pared with its validation copy and in case of difference,
a memory error is generated and both laser channels
are switched off.
Atomic appliance is achieved by latching the configura-
tion registers. This permits a full configuration (different
registers) to be made prior to apply it to the laser chan-
Table 81: Configuration and operation mode
In Configuration mode, the configuration memory
(addr. 0x10 to 0x1F) can be written and read back
to check a correct communication without changing the
present configured operation state of the iC-HTP. In this
mode, the memory integrity check is disabled.
iC-HTP will monitor the time elapsed in configuration
mode and automatically switch the laser off if it exceeds
a configuration mode timeout. The time in configura-
tion mode must be less than 40 ms for ensuring that
no configuration timeout occurs during configuration (cf.
Electrical Characteristics No. E02). The timeout can be
up to 164 ms.
When writing the configuration is completed, iC-HTP is
switched to operation mode by writing "0b01" into the
MODE register (addr. 0x1C). In operation mode the
configuration is applied to the iC-HTP and the memory
integrity check activated. In this mode configuration
registers can only be read (except MODE(1:0) regis-
ter, which is always accessible). Figure 22 shows the
interface to memory structure.
CFG(127:0)
0x10
0x1F
RAM
MODE
Addr. 0x1C
LATCH
MEMERR
ERROR
CHECK
0x30
0x3F
VALIDATION
DB(7:0)
SPI / I2C
RNW
ADR(6:0)
Addr.
Decoder
RNW_RAM
RNW_VAL
Figure 22: Interface, RAM integrity monitoring and configuration latching