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IC-MSB_17 Datasheet, PDF (20/32 Pages) IC-Haus GmbH – SIN/COS SIGNAL CONDITIONER
iC-MSBSAFETY, iC-MSB2
SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER
INPUT CONFIGURATION
Rev F3, Page 20/32
All input stages are configured as instrumentation am-
plifiers and thus directly suitable for differential input
signals. Referenced input signals can be processed as
an option; in this mode input X2 acts as a reference.
Both current and voltage signals can be processed as
input signals, selected using RIN12(0) and RIN0(0).
PXi
GF
VP1
NXi
X2
VREFI
GF
INMODE
BIASEX
0.5 V
OR x OF x
0.25 V
0.05 x V(ACO)
VDC
VN1
k
VREFin
PCHx
GR
NCHx
VPAH
VDCx
Figure 2: Signal conditioning input circuit.
Current Signals
In I Mode an input resistor Rin() becomes active at each
input pin, converting the current signal into a voltage
signal. Input resistance Rin() consists of a pad wiring
resistor and resistor Rui() which is linked to the ad-
justable bias voltage source VREFin(). The following ta-
ble shows the possible selections, with Rin() giving the
typical resulting input resistance (see Electrical Char-
acteristics for tolerances). The input resistor should be
set in such a way that intermediate potentials VDC1
and VDC2 lie between 125 mV and 250 mV (verifiable
in Calibration Mode 2).
Note: The input circuit is not suitable for back-to-back
photodiodes.
Voltage Signals
In V Mode an optional voltage divider can be selected
which reduces unacceptably large input amplitudes to
approx. 25%. The circuitry is equivalent to the resistor
chain in I Mode; the pad wiring resistor is considerably
larger here, however.
For sensors whose offset calibration is to be propor-
tional to an external DC voltage source the reference
source can be selected using BIASEX; for all other
sensors BIASEX should be set to ’00’.
RIN12
RIN0
Code
–000
–010
–100
–110
1—1
0—1
Notes
Adr 0x0E, bit 3:0
Adr 0x13, bit 3:0
Nominal Rin() Intern Rui() I/V Mode
1.7 kΩ
1.6 kΩ
current input
2.5 kΩ
2.3 kΩ
current input
3.5 kΩ
3.2 kΩ
current input
4.9 kΩ
4.6 kΩ
current input
20 kΩ
5 kΩ
voltage input 4:1*
high
impedance
1 MΩ
voltage input 1:1
RIN0 must be set as RIN12 when using INMODE = 1
for single-ended input signals.
*) Refer to Elec.Char. No. 101 for permissible input
voltage range.
VREFin is the voltage divider’s footpoint; input
currents may be positive or negative (Vin > VREFin,
or Vin < VREFin).
Table 18: I/V Mode and Input Resistance
BIAS12
BIAS0
Code
0
1
Notes
Adr 0x0E, bit 6
Adr 0x13, bit 6
Function
VREFI = 2.5 V
for low-side current sinks (e.g. photodiodes with
common anode at GNDS)
Note*: V(PXi) + V(NXi) < 2 x VREFin
VREFI = 1.5 V
for high-side currrent-sources (e.g. photodiodes with
common cathode at VDDS)
for voltage sources versus ground
for Wheatstone sensor bridges (e.g. iC-SM2)
for voltage sources with low-side reference
(e.g. iC-LSHB, when using BIASEX = 11)
Note*: V(PXi) + V(NXi) > 2 x VREFin
*) Relevant if using
- offset references VDC1/VDC2 (see Table 33)
- the input voltage divider (see Table 18)
- sum control mode (see Table 44)
Table 19: Reference Voltage
BIASEX
Code
00*
10
11
Notes
Adr 0x0D, bit 7:6
VREFin
Pin function of X2
internal
Input Index- (negative zero signal)
internal
Output of VREFin12*
external
Input for external reference**:
V(X2) replaces VREFI
*) Do not load, buffering recommended
**) See Elec. Char. Nos. 205 and 206
Table 20: Input Reference Selection
INMODE
Code
0
1
Note
Adr 0x03, bit 2
Function
Differential input signals
Single-ended input signals *
* Input X2 is reference for all inputs.
Table 17: Input Signal Mode