IC-PV Datasheet, PDF (16/28 Pages) IC-Haus GmbH – BATTERY-BUFFERED HALL MULTITURN ENCODER

iC-PV
BATTERY-BUFFERED HALL MULTITURN ENCODER
PARALLEL MODE (SEL = HIGH)
Rev E2, Page 16/28
The input/output behavior in parallel mode is described
in Figure 10. A start pulse on the PRE line triggers the
Hall sensor signal acquisition. The current position is
sent as a 3 bit complementary word via pins P0, N0 to
P2, N2. In this application, the iC-PV operates with a
single power supply on pin VBAT. The pin VDD must be
tied to GND in this mode, the select input SEL needs to
be connected to a logic high potential, e.g. VBAT.
VDD
SEL
VBAT
PRE
P0
P1
P2
N0
N1
N2
t
start
t
process
Sector 101
Sector 011
t
cycle
Figure 10: Line signals for parallel mode (3 bit complementary P0-P2 and N0-N2).
MULTITURN COUNTER
In battery buffered serial interface mode (SEL = low)
and as long as the system is powered up correctly
(battery or external supply), it will count the multiturn po-
sition up to 2^MT_BW − 1 revolutions. There is no counter
overflow handling (positive or negative direction). The
counter can be preloaded to a position given in con-
figuration parameter MT_PREL as described in Table
17. The counter bit width is configured as described in
Table 12.
The multiturn counter value as well as the configuration
RAM are secured by an 8 bit polynomial cyclic redun-
dancy check. Details can be found in the subsequent
EEPROM paragraph.
MT_PREL
Code
0x0000000000
0x0000000001
...
0x00000000FF
...
0xFFFFFFFFFF
Addr. 0x09 - 0x05;
Value
0
1
...
255
...
2⁴⁰ − 1
Table 17: Multiturn preload value