HY67V161610D Datasheet, PDF (8/11 Pages) Hynix Semiconductor – 2 Banks x 512K x 16 Bit Synchronous DRAM

HY57V161610D
A C C H A R A C T E R IS T IC S ( T A = 0 °C t o 7 0 °C , V D D = 3 . 0 V t o 3 . 6 V , V S S = 0 V ^Note1,2 ))
Paramter
R A S cycle time
Operation
Auto Refresh
R A S to CAS delay
RAS active time
R A S precharge time
R A S to RAS bank active delay
C A S to CAS bank active delay
Write command to data-in delay
Data-in to precharge command
Data-in to active command
DQM to data-in Hi-Z
DQM to data mask
MRS to new command
Precharge to data output Hi-Z
Power down exit time
Self refresh exit time
Refresh Time
Symbol
-5
M in
Max
-55
M in M a x
tRC
55
55
tRRC
55
tRCD
15
55
16.5
tRAS
tRP
100
100
40
38.5
K
K
3
3
tRRD
2
2
tCCD
1
1
tWTL
0
0
tDPL
1
1
tDAL
4
4
tDQZ
2
2
tDQM
0
0
tMRD
2
2
tPROZ
3
3
tPDE
1
1
tSRE
1
1
tREF
64
64
-6
Ma
M in
x
60
-
60
-
18
-
100
40
K
3
-
2
-
1
-
0
-
1
-
4
-
2
-
0
-
2
-
3
-
1
-
1
-
64
-
-7
Ma
Min
x
70
-
70
-
20
-
100
45
K
3
-
2
-
1
-
0
-
1
-
4
-
2
-
0
-
2
-
3
-
1
-
1
-
64
-
-8
Ma
M in
x
70
-
70
-
20
-
100
45
K
3
-
2
-
1
-
0
-
1
-
4
-
2
-
0
-
2
-
3
-
1
-
1
-
64
-
-10
Ma
M in
x
70
-
80
-
20
-
100
45
K
2
-
2
-
1
-
0
-
1
-
3
-
2
-
0
-
2
-
3
-
1
-
1
-
64
-
U n it N o t e
ns
ns
ns
ns
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
3
ms
Note :
1. V DD (min) is 3.15V when HY57V161610DTC-7 operates at C A S latency=2 and tCK2=8.9ns.
2.V DD (min) of HY57V161610DTC-5/55 is 3.15V
3. A new command can be given tRRC after self refresh exit.
Rev. 3.6/Apr.01
8