HY51VS17403HG Datasheet, PDF (7/11 Pages) Hynix Semiconductor – 4M x 4Bit EDO DRAM

Write Cycle
Parameter
Write command set-up time
Write command hold time
Write command pulse width
Write command to /RAS lead time
Write command to /CAS lead time
Data-in set-up time
Data-in hold time
Read-Modify-Write Cycle
Parameter
Read-modify-write cycle time
/RAS to /WE delay time
/CAS to /WE delay time
Column address to /WE delay time
/OE hold time from /WE
HY51V(S)17403HG/HGL
Symbol
tWCS
tWCH
tWP
tRWL
tCWL
tDS
tDH
-50
Min Max
0
-
8
-
8
-
8
-
8
-
0
-
8
-
-60
Min Max
0
-
10
-
10
-
10
-
10
-
0
-
10
-
-70
Unit Note
Min Max
0
-
ns 14
13
-
ns
10
-
ns
13
-
ns
13
-
ns
0
-
ns 15
13
-
ns 15
Symbol
tRWC
tRWD
tCWD
tAWD
tOEH
-50
Min Max
111
-
67
-
30
-
42
-
13
-
-60
Min Max
136
-
79
-
34
-
49
-
15
-
-70
Unit Note
Min Max
161
-
ns
92
-
ns 14
40
-
ns 14
57
-
ns 14
18
-
ns
Refresh cycle
Parameter
/CAS set-up time
( /CAS-before-/RAS Refresh Cycle)
/CAS hold time
( /CAS-before-/RAS Refresh Cycle)
/WE setup time
( /CAS-before-/RAS Refresh Cycle)
/WE hold time
( /CAS-before-/RAS Refresh Cycle)
/RAS precharge to /CAS hold time
( /CAS-before-/RAS Refresh Cycle)
Symbol
-50
Min Max
tCSR
5
-
-60
Min Max
5
-
-70
Unit Note
Min Max
5
-
ns
tCHR
8
-
10
-
10
-
ns
tWRP
0
-
0
-
0
-
ns
tWRH
10
-
10
-
10
-
ns
tRPC
5
-
5
-
5
-
ns
Rev.0.1/Apr.01
7