HY51VS17403HG Datasheet, PDF (4/11 Pages) Hynix Semiconductor – 4M x 4Bit EDO DRAM

HY51V(S)17403HG/HGL
DC CHARACTERISTICS (Vcc = 3.3V +/- 10%, TA=0 to 70°C)
Symbol
VOH
Output Level
Output Level voltage(Iout= -2mA)
VOL
Output Level
Output Level voltage(Iout=2mA)
Parameter
ICC1
Operating current
Average power supply operating current
( /RAS, /CAS Cycling : tRC = tRC min)
ICC2
Standby current (TTL interface)
Power supply standby current
(/RAS, /CAS=VIH, Dout = High-Z)
ICC3
/RAS only refresh current
Average power supply current
/RAS only refresh mode
(tRC= tRC min)
ICC4
Fast page mode current
Average power supply current
Fast page mode (tPC=tPC min)
CMOS interface ( /RAS, /CAS >= Vcc-0.2V, Dout = High-Z)
ICC5
Standby current ( L-version)
ICC6 /CAS-before-/RAS refresh current (tRC=tRC min)
ICC7
Battery back up operating current (standby with CBR refresh)
(tRC=31.3us, tRAS<=0.3us, Dout=High-Z)
ICC8
Standby current
( /RAS = VIH, /CAS = VIL, Dout=Enable)
ICC9
Self refresh current
(/RAS, /CAS <=0.2V, Dout=High-Z, CMOS interface)
II(L) Input leakage current, Any input (0V<= Vin<=4.6V)
IO(L) Output leakage current, (Dout is disabled, 0V<= Vout<=4.6V)
50ns
60ns
70ns
50ns
60ns
70ns
50ns
60ns
70ns
50ns
60ns
70ns
Min Max Unit
2.4
Vcc
V
0
0.4
V
-
100
-
90
mA
-
80
-
2
mA
-
100
-
90
mA
-
80
-
90
-
80
mA
-
75
-
1
mA
-
100
uA
-
100
-
90
mA
-
80
-
300
uA
-
5
uA
-
200
uA
-10
10
uA
-10
10
uA
Note :
1. Icc depends on output load condition when the device is selected, Icc(max) is specified at the output open condition
2. Address can be changed once or less while /RAS=VIL
3. Address can be changed once or less while /CAS=VIH
4. /CAS = L (<=0.2) while /RAS=L (<=0.2)
5. L-Version
Note
1, 2
2
1, 3
4
4
1
4
Rev.0.1/Apr.01
4