HY51VS17403HG Datasheet, PDF (6/11 Pages) Hynix Semiconductor – 4M x 4Bit EDO DRAM

Parameter
/OE to Din delay time
/OE delay time from Din
/CAS delay time from Din
Transition time ( Rise and Fall)
Refresh period
Refresh period (L-version)
Read Cycle
Parameter
Access time from /RAS
Access time from /CAS
Access time from column address
Access time from /OE
Read command set-up time
Read command hold time to /CAS
Read command hold time from /RAS
Read command hold time to /RAS
Column address to /RAS lead time
Column address to /CAS lead time
/CAS to output in low-Z
Output data hold time
Output data hold time from /OE
Output buffer turn off time to /OE
Output buffer turn off time
/CAS to Din delay time
Output data hold time from /RAS
Output buffer turn-off time to /RAS
Output buffer turn off time to /WE
/WE to DIN delay time
/RAS to DIN delay time
Rev.0.1/Apr.01
HY51V(S)17403HG/HGL
- continued -
Symbol
tODD
tDZO
tDZC
tT
tREF
-50
Min Max
13
-
0
-
0
-
2
50
-
32
-
128
-60
Min Max
15
-
0
-
0
-
2
50
-
32
-
128
-70
Min Max
18
-
0
-
0
-
2
50
-
32
-
128
Unit Note
ns
5
ns
6
ns
6
ns
7
ms 2K Ref.
ms 2K Ref.
Symbol
tRAC
-50
Min Max
-
50
tCAC
-
13
tAA
-
25
tOAC
-
13
tRCS
0
-
tRCH
0
-
tRCHR
50
-
tRRH
5
-
tRAL
25
-
tCAL
15
-
tCLZ
0
-
tOH
3
-
tOHO
3
-
tOEZ
-
13
tOFF
-
13
tCDD
13
-
tOHR
3
-
tOFR
-
13
tWEZ
-
13
tWDD
13
-
tRDD
13
-
-60
Min Max
-
60
-
15
-
30
-
15
0
-
0
-
60
-
5
-
30
-
18
-
0
-
3
-
3
-
-
15
-
15
15
-
3
-
-
15
-
15
15
-
15
-
-70
Min Max
-
70
-
18
-
35
-
18
0
-
0
-
70
-
5
-
35
-
23
-
0
-
3
-
3
-
-
15
-
15
18
-
3
-
-
15
-
15
18
-
18
-
Unit Note
ns 8,9,19
ns
9,10,
17,19
ns
9,11,
17,19
ns
9
ns
ns 12
ns
ns 12
ns
ns
ns
ns
ns
ns 13
ns 13
ns
5
ns
ns
ns
ns
ns
6