HMT41GU6MFR8A Datasheet, PDF (7/57 Pages) Hynix Semiconductor – DDR3L SDRAM Unbuffered DIMMs Based on 4Gb M-Die

Symbol
DQS0–DQS8
DQS0–DQS8
SA0–SA2
SDA
SCL
VDDSPD
Type
SSTL
Supply
Polarity
Differential
crossing
—
—
—
Function
Data strobe for input and output data.
These signals are tied at the system planar to either VSS or VDDSPD to con-
figure the serial SPD EEPROM address range.
This bidirectional pin is used to transfer data into or out of the SPD
EEPROM. An external resistor may be connected from the SDA bus line to
VDDSPD to act as a pullup on the system board.
This signal is used to clock data into and out of the SPD EEPROM. An
external resistor may be connected from the SCL bus time to VDDSPD to act
as a pullup on the system board.
Power supply for SPD EEPROM. This supply is separate from the VDD/VDDQ
power plane. EEPROM supply is operable from 3.0V to 3.6V.
Rev. 1.2 / Jul. 2013
7