HMT41GU6MFR8A Datasheet, PDF (41/57 Pages) Hynix Semiconductor – DDR3L SDRAM Unbuffered DIMMs Based on 4Gb M-Die

IDD
IDDQ (optional)
VDD
RESET
CK/CK
CKE
CS
RAS, CAS, WE
DDR3
SDRAM
A, BA
ODT
ZQ _VSS
VDDQ
DQS, DQS ^{RTT = 25 Ohm}
DQ, DM,
VDDQ/2
TDQS, TDQS
VSSQ
Measurement Setup and Test Load for IDD and IDDQ (optional) Measurements
[Note: DIMM level Output test load condition may be different from above
Application specific
memory channel
environment
IDDQ
Test Load
Channel
IO Power
Simulation
IDDQ
Simulation
IDDQ
Simulation
Correction
Channel IO Power
Number
Correlation from simulated Channel IO Power to actual Channel IO Power supported
by IDDQ Measurement
Rev. 1.2 / Jul. 2013
41