HY5DU56422DTP Datasheet, PDF (6/37 Pages) Hynix Semiconductor – 256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)

FUNCTIONAL BLOCK DIAGRAM (32Mx8)
4Banks x 8Mbit x 8 I/O Double Data Rate Synchronous DRAM
HY5DU56422D(L)TP
HY5DU56822D(L)TP
HY5DU561622D(L)TP
CLK
/CLK
CKE
/CS
/RAS
/CAS
/WE
Command
Decoder
Bank
Control
Mode
Register
Row
Decoder
Write Data Register
8
2-bit Prefetch Unit
16
8Mx8 / Bank0
8Mx8 / Bank1
8Mx8 / Bank2
8Mx8 / Bank3
16
8
DQS
DM
DQ[0:7]
ADD
Address
BA
Buffer
Column Decoder
Column Address
Counter
CLK_DLL
DQS
DQS
Data Strobe
Transmitter
Data Strobe
Receiver
CLK,
/CLK
DLL
Block
Mode
Register
Rev. 0.1 /May 2004
6