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HY5DU56422DTP Datasheet, PDF (26/37 Pages) Hynix Semiconductor – 256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)
DC CHARACTERISTICS II (TA=0 to 70 oC, Voltage referenced to VSS = 0V)
HY5DU56422D(L)TP
HY5DU56822D(L)TP
HY5DU561622D(L)TP
16Mx16
Parameter Symbol
Test Condition
-J
Operating Current
One bank; Active - Precharge;
tRC=tRC(min); tCK=tCK(min); DQ,DM and
IDD0 DQS inputs changing twice per clock cycle; 80
address and control inputs changing once
per clock cycle
Operating Current
One bank; Active - Read - Precharge;
IDD1
Burst=2; tRC=tRC(min); tCK=tCK(min);
address and control inputs changing once
100
per clock cycle; IOUT=0mA
Precharge Power
Down Standby
Current
IDD2P
All banks idle; Power down mode; CKE=Low,
tCK=tCK(min)
/CS=High, All banks idle; tCK=tCK(min);
Idle Standby Current
IDD2F
CKE=High; address and control inputs
changing once per clock cycle.
50
VIN=VREF for DQ, DQS and DM
Active Power Down
Standby Current
IDD3P
One bank active; Power down mode ;
CKE=Low, tCK=tCK(min)
Active Standby
Current
/CS=HIGH; CKE=HIGH; One bank; Active-
Precharge; tRC=tRAS(max); tCK=tCK(min);
IDD3N DQ, DM and DQS inputs changing twice per 45
clock cycle; Address and other control inputs
changing once per clock cycle
Operating Current
Burst=2; Reads; Continuous burst; One bank
IDD4R
active; Address and control inputs changing
once per clock cycle; tCK=tCK(min);
190
IOUT=0mA
Burst=2; Writes; Continuous burst; One
bank active; Address and control inputs
Operating Current
IDD4W changing once per clock cycle;
190
tCK=tCK(min); DQ, DM and DQS inputs
changing twice per clock cycle
Auto Refresh Current IDD5 tRC=tRFC(min); All banks active
150
Self Refresh Current
IDD6
CKE=<0.2V; External clock on; Normal
tCK=tCK(min)
Low Power
Operating Current -
Four Bank Operation
IDD7
Four bank interleaving with BL=4, Refer to
the following page for detailed test condition
240
Speed
-M -K -H
70
90
10
40
15
40
170
170
140
3
1.5
220
Unit Note
-L
65 mA
80 mA
mA
30 mA
mA
35 mA
150 mA
150 mA
130 mA
mA
mA
200 mA
Rev. 0.1 /May 2004
26