GMS81C1102 Datasheet, PDF (54/89 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C1102 / GMS81C1202
If it needed more higher frequency of PWM, it should be
reduced resolution.
Frequency
Resolution _{T1CK[1:0] T1CK[1:0]}
= 00(125nS) = 01(250nS)
10-bit
7.8KHz
3.9KHz
9-bit
15.6KHz
7.8KHz
8-bit
31.2KHz
15.6KHz
7-bit
62.5KHz
31.2KHz
T1CK[1:0]
= 10(1uS)
0.98KHZ
1.95KHz
3.90KHz
7.81KHz
Table 16-2 PWM Frequency vs. Resolution at 8MHz
The bit POL of TM1 decides the polarity of duty cycle.
If the duty value is set same to the period value, the PWM
output is determined by the bit POL ( 1: High, 0: Low ).
And if the duty value is set to "00_H", the PWM output is
determined by the bit POL ( 1: Low, 0: High ).
It can be changed duty value when the PWM output. How-
erver the changed duty value is output after the current pe-
riod is over. And it can be maintained the duty value at
present output when changed only period value shown as
Figure 16-12 . As it were, the absolute duty time is not
changed in varying frequency. But the changed period val-
ue must greater than the duty value
Note: At PWM output start command, one first pulse would
be output abnormally. Because if user writes regis-
ter values while timer is in operaiton, these register
could be set with certain values at first. To prevent
this operation, user must stop PWM timer clock and
then set the duty and the period register values.
.
TM1
PWM0HR
POL
X
-
-
16BIT
0
-
-
PWME
1
-
-
CAP1 T1CK1 T1CK0 T1CN T1ST
ADDRESS : D2H
RESET VALUE : 00000000
0
X
X
X
X
ADDRESS : D5H
- PWM0HR3PWM0HR2PWM0HR1PWM0HR0 _{RESET VALUE : ----0000}
Bit Manipulation Not Available
-
X
X
X
X
Period High
Duty High
PWM0HR[3:2]
X : The value IS "0" or "1" corresponding your operation.
T0 clock source
T1ST
0 : Stop
1 : Start
T1PPR(8-bit)
COMPARATOR
CLEAR
1
MUX
÷1
T1 ( 8-bit )
fxin
÷2
÷8
COMPARATOR
T1CK[1:0]
T1CN
Slave
T1PDR(8-bit)
SQ
R
POL
PWM0O
[RBFUNC.4]
RB4/
PWM0
PWM0HR[1:0]
Master
T1PDR(8-bit)
Figure 16-10 PWM Mode
Jan. 2002 ver 2.0
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