GMS81C1102 Datasheet, PDF (36/89 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C1102 / GMS81C1202
Address Name
C0H RA
C1H RAIO
C2H RB
C3H RBIO
C4H RC
C5H RCIO
CAH RAFUNC
CBH RBFUNC
CCH PUPSEL
D0H TM0
D1H
T0/TDR0/
CDR0
D2H TM1
D3H
TDR1/
T1PPR
D4H
T1/CDR1/
T1PDR
D5H PWMHR
DEH BUR
E2H IENH
E3H IENL
E4H IRQH
E5H IRQL
E6H IEDS
EAH ADCM
EBH ADCR
ECH BITR¹
ECH
EDH
CKCTLR
Note1
WDTR
EFH PFDR²
Bit 7
Bit 6
Bit 5
RA Port Data Register
RA Port Direction Register
RB Port Data Register
RB Port Direction Register
RC Port Data Register
RC Port Direction Register
ANSEL7 ANSEL6 ANSEL5
-
-
-
-
-
-
-
-
CAP0
Bit 4
ANSEL4
PWMO
-
T0CK2
Bit 3
ANSEL3
INT1I
-
T0CK1
Bit 2
Bit 1
Bit 0
ANSEL2 ANSEL1 ANSEL0
INT0I
BUZO AVREFS
-
PUPSEL1 PUPSEL0
T0CK0 T0CN
T0ST
Timer0 Register / Timer Data Register 0 / Capture Data Register 0
POL
16BIT PWME CAP1 T1CK1 T1CK0 T1CN
T1ST
Timer Data Register 1/ PWM Period Register 1
Timer1 Register / Capture Data Register 1 / PWM Duty Register 1
PWM High Register
BUCK1 BUCK0 BUR5
INT0E INT1E
T0E
ADE
WDTE
BITE
INT0IF INT1IF
T0IF
ADIF
WDTIF
BITIF
-
-
-
-
-
ADEN
ADC Result Data Register
Basic Interval Timer Data Register
BUR4
T1E
-
T1IF
-
-
ADS2
BUR3
-
-
-
-
IED1H
ADS1
BUR2
-
-
-
-
IED1L
ADS0
-
WAKEUP RCWDT WDTON BTCL
BTS2
WDTCL 7-bit Watchdog Counter Register
-
-
-
-
-
PFDIS
BUR1
-
-
-
-
IED0H
ADST
BTS1
PFDM
BUR0
-
-
-
-
IED0L
ADSF
BTS0
PFDS
Table 12-5 Control Registers of GMS81C1202
These registers of shaded area can not be accessed by bit manipulation instruction as “SET1, CLR1”, so should be accessed by
register operation instruction as “LDM dp,#imm”.
1. The register BITR and CKCTLR are located at same address. Address ECH is read as BITR, written to CKCTLR.
2. The register PFDR only be implemented on devices, not on In-circuit Emulator.
Jan. 2002 ver 2.0
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