GMS81C1102 Datasheet, PDF (38/89 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C1102 / GMS81C1202
The operation within data memory (RAM)
ASL, BIT, DEC, INC, LSR, ROL, ROR
Example; Addressing accesses the address 0035_H .
983500 INC !0035H
;A ←RAM[035H]
0035_H
data
~~
0FA00H
98
0FA01_H
35
0FA02_H
00
˜
~~ —
data+1 → data
–
address: 0035
(5) Indexed Addressing
X indexed direct page (no offset) → {X}
In this mode, a address is specified by the X register.
ADC, AND, CMP, EOR, LDA, OR, SBC, STA, XMA
Example; X=15_H
D4
LDA {X}
;ACC←RAM[X].
15_H
data
~~
0FA50_H
D4
—
~~
–
data → A
X indexed direct page, auto increment→ {X}+
In this mode, a address is specified within direct page by
the X register and the content of X is increased by 1.
LDA, STA
Example; X=35_H
DB
LDA {X}+
35_H
data
~~
DB
—
~~
data → A
– ^{36H → X}
X indexed direct page (8 bit offset) → dp+X
This address value is the second byte (Operand) of com-
mand plus the data of
-register. And it assigns the mem-
ory in Direct page.
ADC, AND, CMP, EOR, LDA, LDY, OR, SBC, STA
STY, XMA, ASL, DEC, INC, LSR, ROL, ROR
Example; X=015_H
C645 LDA 45H+X
5AH
data
~~
0FB50H
C6
0FB51_H
45
~~
–
˜
— ^{data → A}
45H+15H=5AH
Jan. 2002 ver 2.0
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