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HMS87C1304A Datasheet, PDF (46/70 Pages) Hynix Semiconductor – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
HMS87C1304A/HMS87C1302A
HYUNDAI MicroElectronics
14. ANALOG TO DIGITAL CONVERTER
The analog-to-digital converter (A/D) allows conversion
To use analog inputs, each port is assigned analog input
of an analog input signal to a corresponding 8-bit digital
port by setting the bit ANSEL[7:0] in RAFUNC register.
value. The A/D module has eight analog inputs, which are
And selected the corresponding channel to be converted by
multiplexed into one sample and hold. The output of the
setting ADS[2:0].
sample and hold is the input into the converter, which gen-
erates the result via successive approximation.
The processing of conversion is start when the start bit
ADST is set to “1”. After one cycle, it is cleared by hard-
The analog reference voltage is selected to VDD or AVref
ware. The register ADCR contains the results of the A/D
by setting of the bit AVREFS in RBFUNC register. If ex-
conversion. When the conversion is completed, the result
ternal analog reference AVref is selected, the bit ANSEL0
is loaded into the ADCR, the A/D conversion status bit
should not be set to “1”, because this pin is used to an an-
ADSF is set to “1”, and the A/D interrupt flag ADIF is set.
alog reference of A/D converter.
The block diagram of the A/D module is shown in Figure
The A/D module has two registers which are the control
register ADCM and A/D result register ADCR. The
ADCM register, shown in Figure 14-2 , controls the oper-
ation of the A/D converter module. The port pins can be
14-1 . The A/D status bit ADSF is set automatically when
A/D conversion is completed, cleared when A/D conver-
sion is in process. The conversion time takes maximum 10
uS (at fxin=8 MHz).
configure as analog inputs or digital I/O.
ADS[2:0]
ry RA7/AN7
ina RA6/AN6
lim RA5/AN5
e RA4/AN4
Pr RA3/AN3
ANSEL7
ANSEL6
ANSEL5
ANSEL4
111
110
101
100
Sample & Hold
S/H
011
A/D Result Register
ADCR(8-bit)
Successive
Approximation
Circuit
ADDRESS : EBH
RESET VALUE : Undefined
ADIF
A/D Interrupt
ANSEL3
010
RA2/AN2
ANSEL2
001
RA1/AN1
ANSEL1
000
RB0/AN0/AVref
Resistor
Ladder
Circuit
ANSEL0 (RAFUNC.0)
VDD Pin
1
0
ADEN
AVREFS (RBFUNC.0)
Figure 14-1 A/D Converter Block Diagram
46
Preliminary
Jan. 2001