HMS87C1304A Datasheet, PDF (43/70 Pages) Hynix Semiconductor – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

HYUNDAI MicroElectronics
HMS87C1304A/HMS87C1302A
If it needed more higher frequency of PWM, it should be
reduced resolution.
Resolution
T1CK[1:0] =
00(125nS)
Frequency
T1CK[1:0] =
01(250nS)
T1CK[1:0] =
10(1uS)
10-bit
7.8KHz
3.9KHz
0.98KHZ
It can be changed duty value when the PWM output. How-
ever the changed duty value is output after the current pe-
riod is over. And it can be maintained the duty value at
present output when changed only period value shown as
Figure 12-12 . As it were, the absolute duty time is not
changed in varying frequency. But the changed period val-
ue must greater than the duty value.
9-bit
15.6KHz
7.8KHz
1.95KHz
Note: If changing the Timer1 to PWM function, it
8-bit
31.2KHz
15.6KHz
3.90KHz
7-bit
62.5KHz
31.2KHz
7.81KHz
should be stop the timer clock firstly, and then
set period and duty register value. If user
writes register values while timer is in opera-
Table 12-2 PWM Frequency vs. Resolution at 8MHz
tion, these register could be set with certain
values.
Ex)
LDM TM1,#00H
The bit POL of TM1 decides the polarity of duty cycle.
LDM T1PPR,#00H
LDM T1PDR,#00H
If the duty value is set same to the period value, the PWM
LDM PWM0HR,#00H
output is determined by the bit POL (1: High, 0: Low). And
LDM RBFUNC,#0001_1100B
if the duty value is set to “00_H”, the PWM output is deter-
mined by the bit POL (1: Low, 0: High).
LDM TM1,#1010_1011B
ary ^TM1
elimin ^PWM0HR
POL
X
-
-
1 6 B IT
0
-
-
PWME
CAP1
T1CK1 T1CK0 T1CN
T1ST
ADDRESS : D2H
RESET VALUE : 00000000
1
0
X
X
X
X
ADDRESS : D5H
-
-
PWM0HR3 PWM0HR2 PWM0HR1 PWM0HR0
RESET VALUE : ----0000
Bit Manipulation Not Available
-
-
X
X
X
X
Period High
Duty High
PWM0HR[3:2]
X: The value “0” or “1” corresponding your operation.
Pr ^{T0 clock source}
T1ST
0 : Stop
1 : Start
T1PPR(8-bit)
COMPARATOR
MUX
÷1
fxin
÷2
÷8
SQ
RB4/
PWM0
CLEAR
1
R
T1 (8-bit)
PWM0O
[RBFUNC.4]
COMPARATOR
POL
T1CK[1:0]
T1CN
Slave
T1PDR(8-bit)
PWM0HR[1:0]
Master
T1PDR(8-bit)
Figure 12-10 PWM Mode
Jan. 2001
Preliminary
43