HMT451R7MFR8A Datasheet, PDF (44/71 Pages) Hynix Semiconductor – DDR3L SDRAM Registered DIMM Based on 4Gb M-die

Standard Speed Bins
DDR3 SDRAM Standard Speed Bins include tCK, tRCD, tRP, tRAS and tRC for each corresponding bin.
DDR3L-800 Speed Bins
For specific Notes See "Speed Bin Table Notes" on page 48.
Speed Bin
CL - nRCD - nRP
Parameter
Internal read command to first data
Symbol
t_AA
DDR3L-800E
6-6-6
min
max
15
20
ACT to internal read or write delay time
t_RCD
15
—
PRE command period
t_RP
15
—
ACT to ACT or REF command period
t_RC
52.5
—
ACT to PRE command period
t_RAS
37.5
9 * tREFI
CL = 6
CWL = 5
t_CK(AVG)
2.5
3.3
Supported CL Settings
6
Supported CWL Settings
5
Unit
Notes
ns
ns
ns
ns
ns
ns
1,2,3
n_CK
n_CK
Rev. 1.0 / Aug. 2013
44