HMT451R7MFR8A Datasheet, PDF (16/71 Pages) Hynix Semiconductor – DDR3L SDRAM Registered DIMM Based on 4Gb M-die

8GB, 1Gx72(2Rank of x8) - page2
S0
1:2
S1
S[3:2] NC
R
BA[N:0]
E
A[N:0]
G
RAS
I
S
CAS
T
E
WE
R
CKE0
/
P
CKE1
L
ODT0
L
ODT1
CK0
120 Ω
±5%
CK0
CK1
120 Ω
CK1
±5%
RS0A → CS0: SDRAMs D[3:0], D8
RS0B → CS0: SDRAMs D[7:4]
RS1A → CS1: SDRAMs D[12:9], D17
RS1B → CS1: SDRAMs D[16:13]
RRBBAA[[NN::00]]BA
→ BA[N:0]: SDRAMs D[3:0], D[12:8], D17
→ BA[N:0]: SDRAMs D[7:4], D[16:13]
RRAA[[NN::00]]AB
→ A[N:0]: SDRAMs D[3:0], D[12:8], D17
→ A[N:0]: SDRAMs D[7:4], D[16:13]
RRASA → RAS: SDRAMs D[3:0], D[12:8], D17
RRASB → RAS: SDRAMs D[7:4], D[16:13]
RCASA → CAS: SDRAMs D[3:0], D[12:8], D17
RCASB → CAS: SDRAMs D[7:4], D[16:13]
RWEA → WE: SDRAMs D[3:0], D[12:8], D17
RWEB → WE: SDRAMs D[7:4], D[16:13]
RCKE0A → CKE0: SDRAMs D[3:0], D8
RCKE0B → CKE0: SDRAMs D[7:4]
RCKE1A → CKE1: SDRAMs D[12:9], D17
RCKE1B → CKE1: SDRAMs D[16:13]
RODT0A → ODT0: SDRAMs D[3:0], D8
RODT0B → ODT0: SDRAMs D[7:4]
RODT1A → ODT1: SDRAMs D[12:9], D17
RODT1A → ODT1: SDRAMs D[16:13]
PCK0A → CK: SDRAMs D[3:0], D8
PCK0B → CK: SDRAMs D[7:4]
PCK1A → CK: SDRAMs D[12:9], D17
PCK1B → CK: SDRAMs D[16:13]
PCK0A → CK: SDRAMs D[3:0], D8
PCK0B → CK: SDRAMs D[7:4]
PCK1A → CK: SDRAMs D[12:9], D17
PCK1B → CK: SDRAMs D[16:13]
PAR_IN
OERR Err_Out
RESET RST
RST: SDRAMs D[17:0]
* S[3:2], CK1 and CK1 are NC
Rev. 1.0 / Aug. 2013
16