HY5S5B2BLF-6E Datasheet, PDF (15/54 Pages) Hynix Semiconductor – 256M (8Mx32bit) Mobile SDRAM

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256Mbit (8Mx32bit) Mobile SDR Memory
HY5S5B2BLF(P) Series
FUNCTIONAL BLOCK DIAGRAM
2Mbit x 4banks x 32 I/O Mobile Synchronous DRAM
CLK
CKE
/CS
/RAS
/CAS
/WE
DQM
0~3
PASR
Extended
Mode
Register
Self refresh
logic & timer
Internal Row
Counter
Row Active
Row
Pre
Decoder
Refresh
Column Active
Column
Pre
Decoder
2Mx32 Bank3
2Mx32 Bank2
2Mx32 Bank1
2Mx32 Bank0
Memory
Cell
Array
Column decoders
DQ0
32 32
DQ31
Bank Select
Column Add
Counter
A0
A1
Address
Register
Burst
Counter
A11
CAS
BA1
Latency
Mode Register
Data Out Control
BA0
Rev 1.0 / Apr. 2006
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