HY5S5B2BLF-6E Datasheet, PDF (11/54 Pages) Hynix Semiconductor – 256M (8Mx32bit) Mobile SDRAM

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256Mbit (8Mx32bit) Mobile SDR Memory
HY5S5B2BLF(P) Series
DC CHARACTERISTICS II (TA= -25 to 85^oC)
Parameter
Symbol
Test Condition
Speed
Unit Note
6
H
S
Operating Current
IDD1
Burst length=1, One bank active
tRC ≥ tRC(min), IOL=0mA
90 75 60 mA 1
Precharge Standby Current ^IDD2P
in Power Down Mode
IDD2PS
CKE ≤ VIL(max), tCK = min
CKE ≤ VIL(max), tCK = ∞
0.3
mA
0.3
mA
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = min
IDD2N
Precharge Standby Current
in Non Power Down Mode
Input signals are changed one time during
2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
10
mA
IDD2NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
1.0
Active Standby Current
in Power Down Mode
IDD3P
IDD3PS
CKE ≤ VIL(max), tCK = min
CKE ≤ VIL(max), tCK = ∞
3
mA
1.0
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = min
IDD3N
Active Standby Current
in Non Power Down Mode
Input signals are changed one time during
2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
15
mA
IDD3NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
10
Burst Mode Operating
Current
IDD4
tCK ≥ tCK(min), IOL=0mA
All banks active
80 75 70 mA 1
Auto Refresh Current
IDD5 tRFC ≥ tRFC(min),
110
mA
Self Refresh Current
IDD6
CKE ≤ 0.2V
See Next Page mA 2
Standby Current in
Deep Power Down Mode
IDD7
See p.45~46, 52~53
10
uA
Note :
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. See the tables of next page for more specific IDD6 current values.
Rev 1.0 / Apr. 2006
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