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HCPL-810J Datasheet, PDF (8/16 Pages) Agilent(Hewlett-Packard) – PLC Powerline DAA IC
Electrical Specifications (Cont.)
Unless otherwise noted, for sinusoidal waveform input and reference resistor Rref = 24 kΩ, all typical values are at TA = 25°C,
VCC1 = 5 V, VCC2 = 5 V; all Minimum/Maximum specifications are at Recommended Operating Conditions.
Transmitter
Parameter
Symbol Min.
Transmit Enable Threshold Volt- Vth, Tx-en 0.8
age
Set-up Time (Tx-PD-out)
ts, Tx
AGC Settling Time
tAGC
Tx Photodetector Output Volt-
2.8
age (Tx-PD-out)
Bandwidth (Tx-PD-out)
BWTxPD
Tx Photodetector Output Imped- ZO, TxPD
ance (Tx-PD-out)
Line Driver (LD)
Power Supply (VCC2) Rejection PSRR
Ratio
Input Impedance
DC Biased Voltage
Gain
ZI, LD
VBias, LD
GT2
1.8
2nd Harmonic Distortion (Tx-out) HD2LD
3rd Harmonic Distortion (Tx-out) HD3LD
Typ.
10
180
3.3
1
1
55
10
2.27
2
−60
−65
Max. Unit
2.4 V
µs
µs
3.6 VPP
MHz
Ω
dB
kΩ
V
2.2 V/V
dB
dB
Test Condition
Fig. Note
VTx-en = 5 V, ITx-in = 250
µAPP, f = 132 kHz, Tx-PD-
out no load
VTx-en = 5 V, ITx-in = 250
µAPP, f = 132 kHz, TA =
25°C
VTx-en = 5 V, ITx-in = 250
µAPP
VTx-en = 5 V, f = 132 kHz
15 1
2
7, 8, 9
50 Hz ripple,
Vripple = 200 mVPP
VTx-en = 5 V, f = 132 kHz
VTx-en = 5 V
VTx-en = 5 V, f = 132 kHz, 10
Tx-out no load, TA = 25°C
VTx-en= 5 V, VTx-out= 3.6 VPP,
f=132 kHz, Tx-out load 50Ω,
TA=25°C
Output Impedance (Tx-out)
Short-Circuit Output Current
ZO, LD
IOS
0.5
Ω
VTx-en = 5 V, f = 132 kHz
7.5
kΩ VTx-en = 0 V, f = 132 kHz
2
APP VTx-en = 5 V, VTx-LD-in = 1.8
3, 4
VPP, f = 132 kHz, tP ≤ 50 µs
Notes:
1. Time from transmit is enabled (VTx-en is set to logic high) until output (Tx-PD-out) is available. See Figure 18 in the Application Information section.
2. Time from output (Tx-PD-out) is available until Tx-PD-out signal reaches 66% of its steady state level. See Figure 18 in the Application Information
section.
3. To keep the junction temperature as close to the ambient temperature as possible, pulse testing method is used. The device is transmit-enabled within
the pulse duration time, tP. Thermal effects must be considered separately.
4. Maximum power dissipation in Control side and Line side IC's needs to be limited to ensure that their respective junction temperature is less than 125°C.
The maximum permissible power dissipation is dependent on the thermal impedance and the ambient temperature. Details on the typical thermal
impedances are given in the Package Characteristics. Further details on applying this to an actual application can be found in the Application Information
section under Thermal Considerations.
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