HDMP-1637A Datasheet, PDF (5/16 Pages) Agilent(Hewlett-Packard) – Gigabit Ethernet SerDes Circuit with Differential PECL Clock Inputs

5
HDMP-1637A (Transmitter Section)
Timing Characteristics
T_A = 0°C to +70°C, V_CC = 3.15 V to 3.45 V
Symbol
Parameter
t_setup
Setup Time
t_hold
t_txlat^[1]
Hold Time
Transmitter Latency
Units
nsec
nsec
nsec
bits
Min.
1.5
1.0
Typ.
3.5
4.4
Max.
Note:
1. The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the parallel data word (as triggered
by the rising edge of the transmit byte clock, REFCLK) and the transmission of the first serial bit of that parallel word (defined by
the rising edge of the first bit transmitted).
REFCLK
t_SETUP
TX[9]-TX[0]
DATA
DATA
DATA
Figure 3. Transmitter Section Timing.
t_HOLD
DATA
DATA
0.0 V AC
2.0 V
0.8 V
DATA BYTE A
DATA BYTE B
± DOUT T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5
t_TXLAT
TX[0]-TX[9]
DATA BYTE B
DATA BYTE C
REFCLK
0.0 V AC
Figure 4. Transmitter Latency.