HDMP-1637A Datasheet, PDF (2/16 Pages) Agilent(Hewlett-Packard) – Gigabit Ethernet SerDes Circuit with Differential PECL Clock Inputs

2
PROTOCOL DEVICE
RBC0
RBC1
BYTSYNC
HDMP-1637A
TRANSMITTER SECTION
PLL
PLL
RECEIVER SECTION
± REFCLK
ENBYTSYNC
Figure 1. Typical Application using the HDMP-1637A.
SERIAL DATA OUT
SERIAL DATA IN
DATA BYTE
TX[0-9]
TXCAP0
TXCAP1
± REFCLK
RXCAP0
RXCAP1
RBC0
RBC1
DATA BYTE
RX[0-9]
FRAME
MUX
TX
PLL/CLOCK
GENERATOR
INTERNAL
TX CLOCKS
OUTPUT
SELECT
INTERNAL
LOOPBACK
INPUT
SELECT
RX
PLL/CLOCK
RECOVERY
SIGNAL
DETECT
FRAME
DEMUX
AND
BYTE SYNC
INTERNAL
RX CLOCKS
INPUT
SAMPLER
BYTSYNC ENBYTSYNC
Figure 2. HDMP-1637A Transceiver Block Diagram.
± DOUT
LOOPEN
± DIN
SIG_DET