RFM31 Datasheet, PDF (70/137 Pages) –

RFM31
Register 08h. Operating Mode and Function Control 2
Bit
Name
Type
D7
D6
D5
antdiv[2:0]
R/w
D4
rxmpk
R/w
D3
Reserved
R/w
D2
enldm
R/w
Reset value = 00000001
D1
ffclrrx
R/w
D0
Reserved
R/w
Bit
Name
Function
Enable Antenna Diversity.
The GPIO must be configured for Antenna Diversity for the algorithm to work properly.
RX state
non RX state
GPIO Ant1
GPIO Ant2
GPIO Ant1 GPIO Ant2
000:
0
1
0
0
001:
1
7:5
antdiv[2:0]
010:
0
0
0
0
1
1
1
011:
1
0
1
1
100: antenna diversity algorithm
0
0
101: antenna diversity algorithm
1
1
110: ant. div. algorithm in beacon mode 0
0
111: ant. div. algorithm in beacon mode 1
1
RX Multi Packet.
When the module is selected to use FIFO Mode (dtmod[1:0]) and RX Packet
4
rxmpk
Handling (enpacrx) then it will fill up the FIFO with multiple valid packets if this
bit is set, otherwise the receiver will automatically leave the RX State after the
first valid packet has been received.
3
Reserved Reserved.
Enable Low Duty Cycle Mode.
If this bit is set to 1 then the module turns on the RX regularly. The frequency
2
enldm
should be set in the Wake-Up Timer Period register, while the minimum ON
time should be set in the Low-Duty Cycle Mode Duration register. The FIFO
mode should be enabled also.
RX FIFO Reset/Clear.
1
ffclrrx
This has to be a two writes operation: Setting ffclrrx =1 followed by ffclrrx = 0
will clear the contents of the RX FIFO.
0
Reserved Reserved.
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