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BB403M Datasheet, PDF (9/14 Pages) Hitachi Semiconductor – Build in Biasing Circuit MOS FET IC UHF/VHF RF Amplifier
Noise Figure vs. Gate Resistance
4
3
2
V DS = 5 V
1
V G1= 5 V
V G2S = 4 V
f = 900 MHz
0
0.1 0.2 0.5 1 2
5 10
Gate Resistance R G (M W )
BB403M
Power Gain vs. Drain Current
20
15
10
V DS = 5 V
V G1= 5 V
5
V G2S = 4 V
RG= variable
f = 900 MHz
0
5 10 15 20 25 30
Drain Current I D (mA)
Noise Figure vs. Drain Current
4
3
2
V DS = 5 V
V G1= 5 V
1
V G2S = 4 V
RG= variable
f = 900 MHz
0
5 10 15 20 25 30
Drain Current I D (mA)
Gain Reduction vs.
Gate2 to Source Voltage
60
V DS = VG1 = 5 V
50
V G2S = 4 V
RG= 470 k W
f = 200 MHz
40
30
20
10
0
0
1
2
3
4
5
Gate2 to Source Voltage V G2S (V)
9