BB403M Datasheet, PDF (10/14 Pages) Hitachi Semiconductor – Build in Biasing Circuit MOS FET IC UHF/VHF RF Amplifier

BB403M
Gain Reduction vs.
Gate2 to Source Voltage
50
V _DS = V_G1 = 5 V
40
V _G2S = 4 V
R_G= 470 k W
f = 900 MHz
30
20
10
0
1
2
3
4
5
Gate2 to Source Voltage V _G2S (V)
Drain Current vs. Gate Resistance
35
V _DS = 5 V
30
V _G1= 5 V
V _G2S = 4 V
25
20
15
10
5
0
0.1 0.2 0.5 1 2
5 10
Gate Resistance R _G (M W)
Input Capacitance vs.
Gate2 to Source Voltage
4
3
2
V _DS = 5 V
V _G1= 5 V
1
V _G2S = 4 V
R_G= 470 kW
f = 1 MHz
0
1
2
3
4
Gate2 to Source Voltage V _G2S (V)
10