HD66750 Datasheet, PDF (39/96 Pages) Hitachi Semiconductor – 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions

HD66750/1
Reset Function
The HD66750/1 is internally initialized by RESET input. Because the busy flag (BF) indicates a busy state
(BF = 1) during the reset period, no instruction or CGRAM data access from the MPU is accepted. The
reset input must be held for at least 1 ms. Do not access the CGRAM or initially set the instructions until the
R-C oscillation frequency is stable after power has been supplied (10 ms).
Instruction Set Initialization:
1. Start oscillation executed
2. Driver output control (CN = 0, NL3Ð0 = 1111, SGS = 0, CMS = 0)
3. B-pattern waveform AC drive (B/C = 0, ECR = 0, NW4Ð0 = 00000)
4. Power control (DC1Ð0 = 00, AP1Ð0 = 00: LCD power off, SLP = 0: Sleep mode off, STB = 0: Standby
mode off)
5. 1/11 bias drive (BS2Ð0 = 000), Two-times boost (BT1Ð0 = 00), Weak contrast (CT5Ð0 = 000000)
6. Entry mode set (I/D = 1: Increment by 1, AM1Ð0 = 00: Horizontal move, LG1Ð0 = 00: Replace mode)
7. Rotation (RT2Ð0 = 000: No shift)
8. Display control (DHE = 0: Double-height display off, REV = 0, GS = 0, D = 0: Display off, PS1Ð0 =
00: Partial scroll off)
9. Cursor control (C = 0: Cursor display off, CM1Ð0 = 00: White blink cursor)
10. Double-height display position (DS6Ð0 = 0000000, DE6Ð0 = 0000000)
11. Vertical scroll control (SL6Ð0 = 0000000: First raster-row displayed at the top)
12. Window cursor display position (HS6Ð0 = HE6Ð0 = VS6Ð0 = VE6Ð0 = 0000000)
13. RAM write data mask (WM15Ð0 = 0000H: No mask)
14. RAM address set (AD10Ð0 = 000H)
CGRAM Data Initialization:
This is not automatically initialized by reset input but must be initialized by software while display is off
(D = 0).
Output Pin Initialization:
1. LCD driver output pins (SEG/COM): Outputs GND level
2. Booster output pins (VLOUT): Outputs Vcc level
3. Oscillator output pin (OSC2): Outputs oscillation signal
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