HD66750 Datasheet, PDF (16/96 Pages) Hitachi Semiconductor – 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions

HD66750/1
Block Function Description
System Interface
The HD66750/1 has four high-speed system interfaces: an 80-system 16-bit/8-bit bus and a 68-system 16-
bit/8-bit bus. The interface mode is selected by the IM1-0 pins.
The HD66750/1 has three 16-bit registers: an index register (IR), a write data register (WDR), and a read
data register (RDR). The IR stores index information from the control registers and the CGRAM. The WDR
temporarily stores data to be written into control registers and the CGRAM, and the RDR temporarily stores
data read from the CGRAM. Data written into the CGRAM from the MPU is first written into the WDR and
then is automatically written into the CGRAM by internal operation. Data is read through the RDR when
reading from the CGRAM, and the first read data is invalid and the second and the following data are
normal. When a logic operation is performed inside of the HD66750/1 by using the display data set in the
CGRAM and the data written from the MPU, the data read through the RDR is used. Accordingly, the MPU
does not need to read data twice nor to fetch the read data into the MPU. This enables high-speed
processing.
Execution time for instruction excluding oscillation start is 0 clock cycle and instructions can be written in
succession.
Table 3 Register Selection by RS and R/W Bits
R/W Bits
0
1
0
1
RS Bits
0
0
1
1
Operations
Writes indexes into IR
Disabled
Writes into control registers and CGRAM through WDR
Reads from CGRAM through RDR
Bit Operation
The HD66750/1 supports the following functions: a bit rotation function that writes the data written from
the MPU into the CGRAM by moving the display position in bit units, a write data mask function that
selects and writes data into the CGRAM in bit units, and a logic operation function that performs logic
operations on the display data set in the CGRAM and writes into the CGRAM. With the 16-bit bus
interface, these functions can greatly reduce the processing loads of the MPU graphics software and can
rewrite the display data in the CGRAM at high speed. For details, see the Graphics Operation Function
section.
Address Counter (AC)
The address counter (AC) assigns addresses to the CGRAM. When an address set instruction is written into
the IR, the address information is sent from the IR to the AC.
After writing into the CGRAM, the AC is automatically incremented by 1 (or decremented by 1). After
reading from the data, the RDM bit automatically updates or does not update the AC.
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