HD66750 Datasheet, PDF (17/96 Pages) Hitachi Semiconductor – 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions

HD66750/1
Graphic RAM (CGRAM)
The graphic RAM (CGRAM) stores bit-pattern data of 128 x 120 dots. It has two bits/pixel and 4096-byte
capacity.
Grayscale Control Circuit
The grayscale control circuit performs four-grayscale control with the frame rate control (FRC) method for
four-monochrome grayscale display. For details, see the Four Grayscale Display Function section.
Timing Generator
The timing generator generates timing signals for the operation of internal circuits such as the CGRAM.
The RAM read timing for display and internal operation timing by MPU access are generated separately to
avoid interference with one another.
Oscillation Circuit (OSC)
The HD66750/1 can provide R-C oscillation simply through the addition of an external oscillation-resistor
between the OSC1 and OSC2 pins. The appropriate oscillation frequency for operating voltage, display
size, and frame frequency can be obtained by adjusting the external-resistor value. Clock pulsescan also be
supplied externally. Since R-C oscillation stops during the standby mode, current consumption can be
reduced. For details, see the Oscillation Circuit section.
Liquid Crystal Display Driver Circuit
The liquid crystal display driver circuit consists of 128 common signal drivers (COM1 to COM128) and
128 segment signal drivers (SEG1 to SEG128). When the number of lines are selected by a program, the
required common signal drivers automatically output drive waveforms, while the other common signal
drivers continue to output unselected waveforms.
Display pattern data is latched when 128-bit data has arrived. The latched data then enables the segment
signal drivers to generate drive waveform outputs. The shift direction of 128-bit data can be changed by
the SGS bit. The shift direction for the common driver can also be changed by the CMS bit by selecting an
appropriate direction for the device mounting configuration.
When multiplexing drive is not used, or during the standby or sleep mode, all the above common and
segment signal drivers output the GND level, halting the display.
Booster (DC-DC Converter)
The booster generates two-, five-, six-, or seven-times voltage input to the Vci pin. With this, both the
internal logic units and LCD drivers can be controlled with a single power supply. Boost output level from
twice to seven-times boost can be selected by software. For details, see the Power Supply for Liquid
Crystal Display Drive section.
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