GS8182S18D Datasheet, PDF (10/31 Pages) GSI Technology – 18Mb Burst of 2 DDR SigmaSIO-II SRAM

GS8182S18D-267/250/200/167
x18 Byte Write Clock Truth Table
BW
BW
Current Operation
K↑
K↑
K↑
(t_n+1)
(t_n+2)
(t_n)
T
T
Write
Dx stored if BWn = 0 in both data transfers
T
F
Write
Dx stored if BWn = 0 in 1st data transfer only
F
T
Write
Dx stored if BWn = 0 in 2nd data transfer only
F
F
Write Abort
No Dx stored in either data transfer
Notes:
1. “1” = input “high”; “0” = input “low”; “X” = input “don’t care”; “T” = input “true”; “F” = input “false”.
2. If one or more BWn = 0, then BW = “T”, else BW = “F”.
D
K↑
(t_n+1)
D1
D1
X
X
D
K↑
(t_n+2)
D2
X
D2
X
x18 Byte Write Enable (BWn) Truth Table
BW1 BW0
1
1
0
1
1
0
0
0
D9–D17
Don’t Care
Don’t Care
Data In
Data In
D0–D8
Don’t Care
Data In
Don’t Care
Data In
Rev: 1.08a 8/2005
10/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology