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GA50SICP12-227_15 Datasheet, PDF (8/13 Pages) GeneSiC Semiconductor, Inc. – Silicon Carbide Junction Transistor/Schottky Diode Co-Pack
GA50SICP12-227
Section V: Driving the GA50SICP12-227
Drive Topology
TTL Logic
Constant Current
High Speed – Boost Capacitor
High Speed – Boost Inductor
Proportional
Pulsed Power
Gate Drive Power
Consumption
High
Medium
Medium
Low
Lowest
Medium
Switching
Frequency
Low
Medium
High
High
High
N/A
Application Emphasis
Wide Temperature Range
Wide Temperature Range
Fast Switching
Ultra Fast Switching
Wide Drain Current Range
Pulse Power
Availability
Coming Soon
Coming Soon
Production
Coming Soon
Coming Soon
Coming Soon
A: Static TTL Logic Driving
The GA50SICP12-227 may be driven with direct (5 V) TTL logic and current amplification. The amplified current level of the supply must meet
or exceed the steady state gate current (IG,steady) required to operate the GA50SICP12-227. Minimum IG,steady is dependent on the anticipated
drain current ID through the SJT and the DC current gain hFE, it may be calculated from the following equation. An accurate value of the hFE
may be read from Figure 4. An optional resistor RG may be used in series with the gate pin to trim IG,steady, also an optional capacitor CG may
be added in parallel with RG to facilitate faster SJT switching if desired, further details on these options are given in the following section.
𝐼𝐼𝐺𝐺 ,𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠
≈
𝐼𝐼𝐷𝐷
ℎ𝐹𝐹𝐹𝐹 (𝑇𝑇,
𝐼𝐼𝐷𝐷 )
∗
1.5
5V
TTL
Gate Signal
5/0V
TTL i/p
D
CG
RG
G
IG,steady
GR
S
Figure 23: TTL Gate Drive Schematic
B: High Speed Driving
The SJT is a current controlled transistor which requires a positive gate current for turn-on and to remain in on-state. An idealized gate current
waveform for ultra-fast switching of the SJT while maintaining low gate drive losses is shown in Figure 24, it features a positive current peak
during turn-on, a negative current peak during turn-off, and continuous gate current during on-state.
Figure 24: An idealized gate current waveform for fast switching of an SJT.
An SJT is rapidly switched from its blocking state to on-state when the necessary gate charge, QG, for turn-on is supplied by a burst of high
gate current, IG,on, until the SJT gate-source capacitance, CGS, and gate-drain capacitance, CGD, are fully charged.
𝑄𝑄𝑜𝑜𝑜𝑜 = 𝐼𝐼𝐺𝐺,𝑜𝑜𝑜𝑜 ∗ 1
𝑄𝑄𝑜𝑜𝑜𝑜 ≥ 𝑄𝑄𝑔𝑔 + 𝑄𝑄𝑔𝑔
Dec 2015
Latest version of this datasheet at: http://www.genesicsemi.com/commercial-sic/sic-modules-copack/
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