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GA50SICP12-227_15 Datasheet, PDF (10/13 Pages) GeneSiC Semiconductor, Inc. – Silicon Carbide Junction Transistor/Schottky Diode Co-Pack
GA50SICP12-227
Figure 26: Typical steady state gate current supplied by the
GA15IDDJT22-FR4 board for the GA50SICP12-227 with the
on board resistance of 0.7 Ω
Figure 27: Maximum gate resistance for safe operation of
the GA50SICP12-227 at different drain currents using the
GA15IDDJT22-FR4 board.
B:2: High Speed, Low Loss Drive with Boost Inductor
A High Speed, Low-Loss Driver with Boost Inductor is also capable of driving the GA50SICP12-227 at high-speed. It utilizes a gate drive
inductor instead of a capacitor to provide the high-current gate current pulses IG,on and IG,off. During operation, inductor L is charged to a
specified IG,on current value then made to discharge IL into the SJT gate pin using logic control of S1, S2, S3, and S4, as shown in Figure 28.
After turn on, while the device remains on the necessary steady state gate current IG,steady is supplied from source VCC through RG. Please refer
to the article “A current-source concept for fast and efficient driving of silicon carbide transistors” by Dr. Jacek Rąbkowski for additional
information on this driving topology.4
S1
VCC
S2
L
D
VEE
S3
G
RG
S4
VEE
GR
S
Figure 28: Simplified Inductive Pulsed Drive Topology
3 – RG = (1/RG1 +1/RG2)-1. Driver is pre-installed with RG1 = 2.2 Ω, RG2 = 1.0 Ω
4 – Archives of Electrical Engineering. Volume 62, Issue 2, Pages 333–343, ISSN (Print) 0004-0746, DOI: 10.2478/aee-2013-0026, June 2013
Dec 2015
Latest version of this datasheet at: http://www.genesicsemi.com/commercial-sic/sic-modules-copack/
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