MB82DP02183C-65L Datasheet, PDF (6/32 Pages) Fujitsu Component Limited. – 32M Bit (2 M word × 16 bit) Mobile Phone Application Specific Memory

MB82DP02183C-65L
■ POWER DOWN
Power Down
The Power Down is low power idle state controlled by CE2. CE2 Low drives the device in power down mode
and maintains low power idle state as long as CE2 is kept Low. CE2 High resumes the device from power down
mode.
This device has 3 power down modes, Sleep, 4M-bit Partial and 8M-bit Partial. These can be programmed by
series of read/write operation. Each mode has following features.
Mode
Data Retention
Retention Address
Sleep (default)
No
N/A
4M-bit Partial
4M bits
00000h to 3FFFFh
8M-bit Partial
8M bits
00000h to 7FFFFh
The default state is Sleep and it is the lowest power consumption but all data will be lost once CE2 is brought
to Low for Power Down. It is not required to program to Sleep mode after power-up.
Power Down Program Sequence
The program requires total six read/write operations with unique address. Between each read/write operation
requires that device be in standby mode. Following table shows the detail sequence.
Cycle #
Operation
Address
Data
1st
Read
1FFFFFh (MSB)
Read Data (RDa)
2nd
Write
1FFFFFh
RDa
3rd
Write
1FFFFFh
RDa
4th
Write
1FFFFFh
Don’t care (X)
5th
Write
1FFFFFh
X
6th
Read
Address Key
Read Data (RDb)
The first cycle is to read from most significant address (MSB).
The second and third cycle are to write back the data (RDa) read by first cycle. If the second or third cycle is
written into the different address, the program is cancelled and the data written by the second or third cycle is
valid as a normal write operation.
The forth and fifth cycle is to write to MSB. The data of forth and fifth cycle are don’t-care. If the forth or fifth
cycle is written into different address, the program is also cancelled but write data may not be written as normal
write operation.
The last cycle is to read from specific address key for power down mode selection.
Once this program sequence is performed from a Partial mode to other Partial mode, the write data stored in
memory cell array may be lost. So, it should perform this program prior to regular read/write operation if Partial
power down mode is used.
Address Key
The address key has following format.
Mode
A20
Sleep (default)
1
4M-bit Partial
1
8M-bit Partial
0
Address
A19
A18 to A0
1
1
0
1
1
1
Hexadecimal
1FFFFFh
17FFFFh
0FFFFFh
6