MB82DP02183F Datasheet, PDF (5/32 Pages) Fujitsu Component Limited. – MEMORY Mobile FCRAM CMOS 32 M Bit (2 M word x 16 bit) Mobile Phone Application Specific Memory

MB82DP02183F-65L
■ POWER DOWN
• Power Down
The Power Down is low power idle state controlled by CE2. CE2 Low drives the device in Power Down mode
and maintains low power idle state as long as CE2 is kept Low. CE2 High resumes the device from Power Down
mode.
This device has three Power Down modes, Sleep, 4 M-bit Partial and 8 M-bit Partial. The selection of Power
Down mode can be programmed by series of read/write operation. Each mode has following data retention
features.
Mode
Data Retention
Retention Address
Sleep (default)
No
N/A
4 M-bit Partial
4 M bits
000000h to 03FFFFh
8 M-bit Partial
8 M bits
000000h to 07FFFFh
The default state is Sleep and it is the lowest power consumption but all data will be lost once CE2 is brought
to Low for Power Down. It is not required to program to Sleep mode after power-up.
• Power Down Program Sequence
The program requires total six read/write operations with unique address and data. The device should be in
standby mode in the interval between each read/write operation. The following table shows the detail sequence.
Cycle #
Operation
Address
Data
#1
Read
1FFFFFh (MSB)
Read Data (RDa)
#2
Write
1FFFFFh
RDa
#3
Write
1FFFFFh
RDa
#4
Write
1FFFFFh
Don't Care (X)
#5
Write
1FFFFFh
X
#6
Read
Address Key
Read Data (RDb)
The Cycle#1 is to read from most significant address (MSB).
The Cycle#2 and Cycle#3 are to write to MSB. If the Cycle#2 or Cycle#3 is written into the different address,
the program is cancelled and the data written by the Cycle#2 or Cycle#3 is valid as a normal write operation. It
is recommended to write back the data (RDa) read by Cycle#1 to MSB in order to secure the data.
The Cycle#4 and Cycle#5 are to write to MSB. The data of Cycle#4 and Cycle#5 becomes the same arbitrary
data (Don't-Care). If the Cycle#4 or Cycle#5 is written into different address, the program is also cancelled but
write data may not be written as normal write operation.
The Cycle#6 is to read from specific address key for mode selection. And read data (RDb) is invalid.
Once this program sequence is performed from a Partial mode to the other Partial mode, the written data stored
in memory cell array may be lost. Therefore, this program should be performed prior to regular read/write
operation if Partial Power Down mode is used.
• Address Key
The address key has following format.
Mode
A20
Sleep (default)
1
4 M-bit Partial
1
8 M-bit Partial
0
Address
A19
A18 to A0
1
1
0
1
1
1
Hexadecimal
1FFFFFh
17FFFFh
0FFFFFh
DS05-11460-1E
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