MB81EDS516445 Datasheet, PDF (5/52 Pages) Fujitsu Component Limited. – 512M Bit (4 bank x 2M word x 64 bit) Consumer Applications Specific Memory for SiP

■ BLOCK DIAGRAM
CK
CK
CKE
CLOCK
BUFFER
A[12:0]
BA[1:0]
ADDRESS
BUFFER
CS
RAS
CAS
WE
DM[7:0]
DQS[7:0]
DQ[63:0]
COMMAND
DECODER
I/O
BUFFER
To each block
BURST
COUNTROLLER
ADDRESS
COUNTROLLER
MODE
REGISTER
MEMORY
CORE
CONTROLLER
MB81EDS516445
VDDQ
VDD
VSS
VSSQ
Y CONTROLLER
Bank3
Bank2
Bank1
Bank0
MEMORY
CELL
ARRAY
(2 M bit × 64)
READ
AMP
WRITE
AMP
BUS
CONTROLLER
DS05-11464-1E
5