|
MB86612 Datasheet, PDF (37/40 Pages) Fujitsu Component Limited. – IEEE 1394 Bus Controller (for MPEG, DVC) | |||
|
◁ |
MB86612
4. Bank 2 Registers
Bank 2 contains CSRâs.
Access to this bank is enabled by writing â0002hâ to the bank select register (3Eh).
Address
HEX A5 A4 A3 A2 A1
Write operation
Read operation
10 0 1 0 0 0
bus manager ID register (high)
â
12 0 1 0 0 1
bus manager ID register (low)
â
14 0 1 0 1 0 bandwidth available register (high)
â
16 0 1 0 1 1 bandwidth available register (low)
â
18 0 1 1 0 0 channels available high register (high)
â
1A 0 1 1 0 1 channels available high register (low)
â
1C 0 1 1 1 0 channels available low register (high)
â
1E 0 1 1 1 1 channels available low register (low)
â
20 1 0 0 0 0
(reserved)
â
22 1 0 0 0 1
(reserved)
â
24 1 0 0 1 0
(reserved)
â
26 1 0 0 1 1
(reserved)
â
28 1 0 1 0 0
(reserved)
â
2A 1 0 1 0 1
(reserved)
â
2C 1 0 1 1 0
(reserved)
â
2E 1 0 1 1 1
(reserved)
â
30 1 1 0 0 0
(reserved)
â
32 1 1 0 0 1
(reserved)
â
34 1 1 0 1 0
(reserved)
â
36 1 1 0 1 1
(reserved)
â
38 1 1 1 0 0
(reserved)
â
3A 1 1 1 0 1
(reserved)
â
3C 1 1 1 1 0
(reserved)
â
37
|
▷ |