MB86612 Datasheet, PDF (31/40 Pages) Fujitsu Component Limited. – IEEE 1394 Bus Controller (for MPEG, DVC)

2.5.3 Receiving Operation
(1) Start Receiving Operation
Parameter
ICLK rise to ILWRE fall
ILWRE fall to IERR fall*¹
ILWRE fall to IV fall
IV fall to ICLK rise
Data output definition time
Data output disable time
TS output assert time*²
MB86612
Symbol
tCHLL
tLLEL
tLLVL
tVLCH
tVLIDV
tCLIDX
tTSWL
Value
Min.
Max.
—
40
—
1 ticlk + 10
1 ticlk + 10
—
20
—
—
20
0
10
32 ticlk – 10
—
Unit
ns
ns
ns
ns
ns
ns
ns
ICLK
IDIR
ILWRE
IERR
TS* ³
IV
ID7 to ID0
tCHLL
tLLEL
tLLVL
tTSWL
tVLCH
tVLIDV
Hi − Z
tCLIDX
1
2
*1: The IERR signal is output when an error is detected in receiving data.
*2: Specification tD is valid only in DVC mode. It does not apply to MPEG mode.
*3: The TS signal is output in synchronization with the rise of the ICLK pulse at the time the receiving packet time
stamp match is detected.
31