MB82DBS02163D-70L Datasheet, PDF (24/57 Pages) Fujitsu Component Limited. – 32 M Bit (2 M word×16 bit) Mobile Phone Application Specific Memory

MB82DBS02163D-70L
(6) Synchronous Write Operation (Burst Mode)
(At recommended operating conditions unless otherwise noted)
Parameter
Symbol
Value
Min
Max
Unit Note
Burst Write Cycle Time
tWCB
⎯
8000
ns
Data Setup Time to CLK
tDSCK
4
⎯
ns
Data Hold Time from CLK
tDHCK
2
⎯
ns
WE Low Setup Time to 1st Data Input
tWLD
30
⎯
ns
LB, UB Setup Time for Write
tBS
−5
⎯
ns *1
WE Setup Time to CLK
tWSCK
4
⎯
ns
WE Hold Time from CLK
tCKWH
2
⎯
ns
CE1 Low to WAIT High
tCLTH
5
15
ns *2
WE Low to WAIT High
tWLTH
5
15
ns *2
CE1 High to WAIT High-Z
tCHTZ
⎯
12
ns *2
Burst End CE1 Low Hold Time from CLK
tCKCLH
2
⎯
ns
Burst End CE1 High Setup Time to next CLK
tCHCK
4
⎯
ns
Burst End LB, UB Hold Time from CLK
tCKBH
2
⎯
ns
Burst Terminate
Recovery Time
BL = 8, 16
BL = Continuous
30
tTRB
70
⎯
ns *3
⎯
ns *3
*1: Defined from the valid input edge to the High to Low transition of either ADV, CE1, or WE, whichever occurs
last. And once LB, UB are determined, LB, UB must not be changed until the end of burst write.
*2: The output load 50 pF with 50 Ω termination to VDD × 0.5 V.
*3: Defined from the Low to High transition of CE1 to the High to Low transition of either ADV or CE1 whichever
occurs late for the next access.
24