MB84VD23280EA Datasheet, PDF (22/45 Pages) Fujitsu Component Limited. – 64M (x8/x16) FLASH MEMORY & 8M (x8/x16) STATIC RAM

MB84VD23280EA-90/MB84VD23280EE-90
• Read Only Operations Characteristics (Flash)
Parameter
Symbol
JEDEC Standard
Condition
Read Cycle Time
tAVAV
tRC
—
Address to Output Delay
tAVQV
tACC
CEf = VIL
OE = VIL
Chip Enable to Output Delay
tELQV
tCEf
OE = VIL
Output Enable to Output Delay
tGLQV
tOE
—
Chip Enable to Output High-Z
tEHQZ
tDF
—
Output Enable to Output High-Z
tGHQZ
tDF
—
Output Hold Time From Addresses,
CEf or OE, Whichever Occurs First
tAXQX
tOH
—
RESET Pin Low to Read Mode
—
tREADY
—
Note: Test Conditions– Output Load:1 TTL gate and 30 pF
Input rise and fall times: 5 ns
Input pulse levels: 0.0 V to VCCf
Timing measurement reference level
Input: 0.5×VCCf
Output: 0.5×VCCf
Value (Note)
Unit
Min.
Max.
90
—
ns
—
90
ns
—
90
ns
—
35
ns
—
30
ns
—
30
ns
0
—
ns
—
20
µs
22