MB84VD23280EA Datasheet, PDF (17/45 Pages) Fujitsu Component Limited. – 64M (x8/x16) FLASH MEMORY & 8M (x8/x16) STATIC RAM

MB84VD23280EA-90/MB84VD23280EE-90
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*1: This command is valid while Fast Mode.
*2: This command is valid while RESET = VID.
*3: This command is valid while Hi-ROM mode.
*4: The data “00h” is also acceptable.
Notes: 1. Address bits A21 to A11 = X = “H” or “L” for all address commands except or Program Address (PA),
Sector Address (SA), and Bank Address (BA), and Sector Group Address (SPA).
2. Bus operations are defined in Tables 3 and 4.
3. RA =Address of the memory location to be read
PA = Address of the memory location to be programmed
Addresses are latched on the falling edge of the write pulse.
SA = Address of the sector to be erased. The combination of A21, A20, A19, A18, A17, A16, A15, A14, A13, and
A12 will uniquely select any sector.
BA = Bank Address (A21, A20, A19)
4. RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the falling edge of write pulse.
5. SPA =Sector group address to be protected. Set sector group address and (A6, A3, A2, A1, A0) = (0, 0, 0, 1, 0).
SD = Sector group protection verify data. Output 01h at protected sector group addresses and output
00h at unprotected sector group addresses.
6. HRA = Address of the Hi-ROM area Word Mode:000000h to 00007Fh
Byte Mode:000000h to 0000FFh
7. HRBA = Bank Address of the Hi-ROM area (A21 = A20 = A19 = VIL)
8. The system should generate the following address patterns:
Word Mode: 555h or 2AAh to addresses A10 to A0
Byte Mode: AAAh or 555h to addresses A10 to A0, and A-1
9. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
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