DS_FT313H Datasheet, PDF (15/64 Pages) Future Technology Devices International Ltd. – The FT313H is a Hi-Speed Universal Serial Bus (USB) Host Controller compatible with Universal Serial Bus Specification Rev 2.0 and supports data transfer speeds of up to 480M bit/s.

Document No.: FT_000589
FT313H USB2.0 HS Host Controller Datasheet Version 1.1
Clearance No.: FTDI# 318
Bus Mode ALE/ADV_N
CLE
DATA_BUS
_WIDTH
General
LOW
HIGH
0
Multiplex 16-bit
Table 4-1 Bus Configuration modes
Signal Description
select: control signals
 DACK: DMA acknowledge input
 DREQ: DMA request output
 AD[15:0]: 16-bit data bus
 ALE, write(WR_N), read(RD_N), chip
select: control signals
 DACK: DMA acknowledge input
 DREQ: DMA request output
SRAM mode
AD[15:0]
A[7:0]
-
CS_N
RD_N/RE_N
NOR mode
AD[15:0]
-
ADV_N
CS_N
OE_N
General
Multiplex
mode
AD[15:0]
-
ALE
CS_N
RD_N/RE_N
Type
I/O
I
I
I
I
Description
Data or address bus
Address bus
Address or command valid
Chip select
Read control
WR_N/WE_N
INT
DREQ
DACK
WE_N
INT
-
-
WR_N/WE_N
I
INT
O
DREQ
O
DACK
I
Table 4-2 Pin information of the bus interface
Write control
Interrupt request
DMA request
DMA acknowledge
4.2 SRAM bus interface mode
The bus interface will be in SRAM 16-bit mode if pins ALE/ADV_N and CLE are HIGH, when:
• The CS_N/CE_N pin goes LOW, and the RD_N /RE_N/OE_N pin goes LOW.
Then, if the DATA_BUS_WIDTH bit is set, the bus interface will be in SRAM 8-bit mode.
In SRAM mode, A[7:0] is the 8-bit address bus and AD[15:0] is the separate 16-bit data bus.
The FT313H pins RD_N /RE_N/OE_N and WR_N/WE_N are the read and write strobes. The
SRAM bus interface supports both 8-bit and 16-bit bus width that can be configured by setting
or clearing bit DATA_BUS_WIDTH. The DMA transfer is also applicable to this interface.
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