33894 Datasheet, PDF (9/28 Pages) Freescale Semiconductor, Inc – Quad High-Side Switch

ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V ≤ V_DD ≤ 5.5 V, 6.0 V ≤ V_PWR ≤ 27 V, -40°C ≤ T_J ≤ 150°C unless otherwise noted.
Typical values noted reflect the approximate parameter means at T_A = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
CONTROL INTERFACE
Input Logic High Voltage ⁽¹²⁾
V_IH
0.7 V_DD
–
–
V
Input Logic Low Voltage ⁽¹²⁾
V_IL
–
–
0.2 V_DD
V
Input Logic Voltage Hysteresis ⁽¹²⁾
V_IN(HYS)
100
350
750
mV
Input Logic Pulldown Current (SCLK, SI, IN[0:3])
RST Input Voltage Range
I_DWN
V_RST
5.0
–
20
µA
4.5
5.0
5.5
V
SO, FS Tri-State Capacitance ⁽¹³⁾
C_SO
–
–
20
pF
Input Logic Pulldown Resistor (RST) and WAKE
Input Capacitance ⁽¹⁴⁾
R_DWN
C_IN
100
200
400
kΩ
–
4.0
12
pF
Wake Input Clamp Voltage ⁽¹⁵⁾
I_CL(WAKE) < 2.5 mA
V_CL(WAKE)
V
7.0
–
14
Wake Input Forward Voltage
I_CL(WAKE) = -2.5 mA
V_F(WAKE)
V
- 2.0
–
-0.3
SO High-State Output Voltage
I_OH = 1.0 mA
V_SOH
V
0.8 V_DD
–
–
FS, SO Low-State Output Voltage
I_OL = -1.6 mA
V_SOL
V
–
0.2
0.4
SO Tri-State Leakage Current
CS > 0.7 V_DD
I_SO(LEAK)
- 5.0
0
µA
5.0
Input Logic Pullup Current ⁽¹⁶⁾
CS, V_IN > 0.7 V_DD
I_UP
µA
5.0
–
20
FSI Input pin External Pulldown Resistance ⁽¹⁷⁾
FSI Disabled, HS[0:3] Indeterminate
FSI Enabled, HS[0:3] OFF
FSI Enabled, HS0 ON, HS[1:3] OFF
FSI Enabled, HS0 and HS2 ON, HS1 and HS3 OFF
RFS
kΩ
RFS_DIS
–
0
1.0
RFS_OFFOFF
6.0
6.5
7.0
RFS_ONOFF
15
17
19
RFS_ONON
40
Infinite
–
Notes
12. Upper and lower logic threshold voltage range applies to SI, CS, SCLK, RST, IN[0:3], and WAKE input signals. The WAKE and RST
signals may be supplied by a derived voltage referenced to V_PWR.
13. Parameter is guaranteed by process monitoring but is not production tested.
14. Input capacitance of SI, CS, SCLK, RST, and WAKE. This parameter is guaranteed by process monitoring but is not production tested.
15. The current must be limited by a series resistance when using voltages > 7.0 V.
16. Pullup current is with CS OPEN. CS has an active internal pullup to V_DD.
17. The selection of the RFS must take into consideration the tolerance, temperature coefficient and lifetime duration to assure that the
resistance value will always be within the desired (specified) range.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33894
9