33894 Datasheet, PDF (23/28 Pages) Freescale Semiconductor, Inc – Quad High-Side Switch

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 15. Serial Output Bit Map Description
Previous STATR
SO Returned Data
SO SO SO SO SO OD
A4 A3 A2 A1 A0 15
OD
14
OD
13
OD
12
OD
11
OD
10
OD9 OD8 OD7 OD6 OD5 OD4
OD3
OD2
OD1
OD0
A₁ A₀ 0 0 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
x 0 0 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
OTF_s
IN3_SPI
OCHF_s
IN2_SPI
OCLF_s
IN1_SPI
OLF_s
IN0_SPI
x 1 0 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 CSNS3 EN CSNS2 EN CSNS1 EN CSNS0 EN
A₁ A₀ 0 1 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 SOCH_s
SOCL2_s SOCL1_s SOCL0_s
A₁ A₀ 0 1 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 OL_DIS_s OCL_DIS_s OCLT1_s OCLT0_s
A₁ A₀ 1 0 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 Fast_SR_s CSNS_high_s DIR_DIS_s A/O_s
x 0 1 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
–
–
UV_DIS OV_DIS
x 1 1 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
–
WDTO
WD1
WD0
x 0 1 1 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 HS2_failsaf HS0_failsaf
WD_en
WAKE
x 1 1 1 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
IN3
IN2
IN1
IN0
x = Don’t care.
s = Output selection with the bits A₁A₀ as defined in Table 9, page 20.
PREVIOUS ADDRESS SOA4 : SOA0 = A₁A₀000
Bits OD3 : OD0 reflect the current state of the Fault register
(FLTR) corresponding to the output previously selected with
the bits A₁A₀ (Table 16).
Table 16. Output-Specific Fault Register
OD3
OD2
OD1
OD0
OTF_s
OCHF_s
OCLF_s
OLF_s
s = Selection of the output.
Note The FS pin reports all faults. For latched faults, this
pin is reset by a new Switch ON command (via SPI or direct
input IN).
PREVIOUS ADDRESS SOA4 : SOA0 = X0001
Data in bits OD3 : OD0 contains IN3_SPI : IN0_SPI
programmed bits for outputs HS3 : HS0, respectively.
PREVIOUS ADDRESS SOA4 : SOA0 = X1001
Data in bits OD3 : OD0 contains the programmed
CSNS3 EN : CSNS0 EN bits for outputs HS3 : HS0,
respectively.
PREVIOUS ADDRESS SOA4 : SOA0 = A₁A₀010
Data returned in bits OD3 : OD0 are programmed current
values for the overcurrent high detection level (refer to
Table 11, page 21) and the overcurrent low detection level
(refer to Table 10, page 21), corresponding to the output
previously selected with A₁A₀.
PREVIOUS ADDRESS SOA4 : SOA0 = A₁A₀011
The returned data contains the programmed values in the
CDTOLR register for the output selected with A₁A₀.
PREVIOUS ADDRESS SOA4 : SOA0 = A₁A₀100
The returned data contains the programmed values in the
DICR register for the output selected with A₁A₀.
PREVIOUS ADDRESS SOA4 : SOA0 = X0101
The returned data contains the programmed values in the
UOVR register.
PREVIOUS ADDRESS SOA4 : SOA0 = X1101
The returned data contains the programmed values in the
WDR register. Bit OD2 (WDTO) reflects the status of the
watchdog circuitry. If WDTO bit is logic [1], the watchdog has
timed out and the device is in Fail-Safe mode. IF WDTO is
logic [0], the device is in Normal mode (assuming the device
is powered and not in the Sleep mode), with the watchdog
either enabled or disabled.
PREVIOUS ADDRESS SOA4 : SOA0 = X0110
The returned data OD3 and OD2 contain the state of the
outputs HS2 and HS0, respectively, in case of Fail-Safe
state. This information is stated with the external resistance
placed at the FSI pin. OD1 indicates if the watchdog is
enabled or not. OD0 returns the state of the WAKE pin.
PREVIOUS ADDRESS SOA4 : SOA0 = X1110
The returned data OD3 : OD0 reflects the state of the direct
pins IN3 : IN0, respectively.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33894
23