33894 Datasheet, PDF (10/28 Pages) Freescale Semiconductor, Inc – Quad High-Side Switch

ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions 4.5 V ≤ V_DD ≤ 5.5 V, 6.0 V ≤ V_PWR ≤ 27 V, -40°C ≤ T_J ≤ 150°C unless otherwise noted.
Typical values noted reflect the approximate parameter means at T_A = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER OUTPUT TIMING HS0:HC3
Output Rising Slow Slew Rate A (DICR D3 = 0) ⁽¹⁸⁾
9.0 V < V_PWR < 16 V
Output Rising Slow Slew Rate B (DICR D3 = 0) ⁽¹⁹⁾
9.0 V < V_PWR < 16 V
Output Rising Fast Slew Rate A (DICR D3 = 1) ⁽¹⁸⁾
9.0 V < V_PWR < 16 V
Output Rising Fast Slew Rate B (DICR D3 = 1) ⁽¹⁹⁾
9.0 V < V_PWR < 16 V
Output Falling Slow Slew Rate A (DICR D3 = 0) ⁽¹⁸⁾
9.0 V < V_PWR < 16 V
Output Falling Slow Slew Rate B (DICR D3 = 0) ⁽¹⁹⁾
9.0 V < V_PWR < 16 V
Output Falling Fast Slew Rate A (DICR D3 = 1) ⁽¹⁸⁾
9.0 V < V_PWR < 16 V
Output Falling Fast Slew Rate B (DICR D3 = 1) ⁽¹⁹⁾
9.0 V < V_PWR < 16 V
Output Turn-ON Delay Time in Fast/Slow Slew Rate ⁽²⁰⁾
DICR = 0, DICR = 1
Output Turn-OFF Delay Time in Slow Slew Rate Mode ⁽²¹⁾
DICR = 0
Output Turn-OFF Delay Time in Fast Slew Rate Mode ⁽²¹⁾
DICR = 1
Overcurrent Low Detection Blanking Time (OCLT[1:0])
00
01 ⁽²²⁾
10
11
SR_{RA_SLOW}
0.1
SR_{RB_SLOW}
0.015
SR_{RA_FAST}
0.2
SR_{RB_FAST}
0.015
SR_{FA_SLOW}
0.1
SR_{FB_SLOW}
0.015
SR_{FA_FAST}
0.4
SR_{FB_FAST}
0.05
t _DLY(ON)
2.0
t _{DLY_SLOW(O}
FF)
40
t _{DLY_FAST(O}
FF)
20
t _OCL0
t _OCL1
t _OCL2
t _OCL3
108
–
55
0.08
0.3
0.05
0.5
0.05
0.3
0.05
1.0
0.175
30
460
120
155
–
75
0.15
0.5
0.15
1.5
0.5
0.5
0.15
2.0
0.6
200
1000
400
202
–
95
0.25
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
µs
µs
µs
ms
Notes
18. Rise and Fall Slew Rates A measured across a 5.0 Ω resistive load at high-side output = 0.5 V to V_PWR-3.5 V (see Figure 4, page 13).
These parameters are guaranteed by process monitoring.
19. Rise and Fall Slew Rates B measured across a 5.0 Ω resistive load at high-side output = 0.5 V to V_PWR-3.5 V (see Figure 4). These
parameters are guaranteed by process monitoring.
20. Turn-ON delay time measured from rising edge of any signal (IN[0:3], SCLK, CS) that would turn the output ON to V_HS[0:3] = 0.5 V with
R_L = 5.0 Ω resistive load.
21. Turn-OFF delay time measured from falling edge of any signal (IN[0:3], SCLK, CS) that would turn the output OFF to V_HS[0:3] = V_PWR-
0.5 V with R_L = 5.0 Ω resistive load.
22. This logical bit is not defined. Do not use.
33894
10
Analog Integrated Circuit Device Data
Freescale Semiconductor