33486A Datasheet, PDF (9/30 Pages) Freescale Semiconductor, Inc – Dual High-Side Switch for H-Bridge Applications

FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The full bridge is partitioned into three blocks, the 33486A
and two low-side MOSFETS. Each block has a dedicated
package.
The 33486A incorporates two 15 mΩ N-channel high-side
power MOSFETS and two low-side gate drivers. The outputs
are fully protected against shorts to ground, shorts to V_BAT,
shorted loads, overvoltage / undervoltage, and
overtemperature. The device can directly interface with a
microcontroller for control and diagnostic functions.
The 33486A is designed for typical DC-motor control in an
H-Bridge configuration.
FUNCTIONAL TERMINAL DESCRIPTION
SUPPLY VOLTAGE (V_BAT)
The backside of the 33486A, called the tab, is the power
supply of the device. It has undervoltage and overvoltage
detection. In addition to its supply function, the tab
contributes to the thermal behavior of the device by
conducting the heat from the switching MOSFET to the
printed circuit board.
INPUTS (IN1 AND IN2)
IN1 and IN2 terminals are input control terminals used to
control the outputs (OUT1 and OUT2) and the gates of the
low-side power MOSFETs (GLS1 and GLS2). When the input
is a logic LOW, the associated output is low (high-side
internal MOSFETs OFF and low-side external MOSFETs
ON). (Refer to Table 5, TRUTH TABLE, page 21, for more
information.) These terminals are 5.0 V CMOS-compatible
inputs.
OUTPUTS (OUT1 AND OUT2)
OUT1 and OUT2 terminals are the sources of the internal
high-side MOSFETs. OUT1 and OUT2 are controlled using
the IN1 and IN2 inputs, respectively. These outputs are
current limited and thermally protected.
GATE LOW SIDE (GLS1 AND GLS2)
GLS1 and GLS2 terminals are the gates of the external
low-side MOSFETs. These MOSFETs are controlled using
IN1 and IN2 inputs. When the input (INn) is logic HIGH, the
associated GLS is grounded to turn off the external low-side
MOSFET. (Refer to Table 5, TRUTH TABLE for more
information.)
WAKE
The WAKE terminal is used to place the device in a sleep
mode. When WAKE terminal voltage is a logic LOW state, the
device is in sleep mode and its bias current is at a minimum.
The device is enabled and fully operational when WAKE
terminal voltage is logic HIGH.
STATUS (ST)
The status terminal indicates when the device is in fault
mode. It reports overtemperature and / or overcurrent faults. It
goes active low when a fault mode is detected by the device
on either one channel or both simultaneously. Its internal
structure is an open-drain architecture with an internal clamp
at 6.0 V. An external 10 kΩ pull-up resistor connected to V_DD
(5.0 V) is needed. Refer to Table 5, TRUTH TABLE.
CURRENT SENSE (CUR R)
The Current Sense terminal delivers a ratio amount (1/
3700) of the sum of the high-side currents that can be used
to generate signal ground-referenced output voltages for use
by the microcontroller with a 1.0 kΩ pull-down resistor.
GROUND (GND)
This terminal is the ground of the device.
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
Power Supply
The 33486A can be directly connected to the power supply
line. The device has a standby mode (Wake at low logic level)
with a ultra-low consumption (10 µA max). In operation when
inputs are active, the supply current is up to 20 mA.
With the high current and fast switching ability of the
33486A, it is recommended that sufficient capacitance (tens
of microfarads) be placed between VBAT and GND of the IC.
This will help ensure that the power supply stays within the
specified limits.
The internal charge pump is activated when Wake is at
high logic level. It is self-oscillating with a frequency that can
Analog Integrated Circuit Device Data
Freescale Semiconductor
33486A
9